Datasheet

ADE7854/ADE7858/ADE7868/ADE7878 Data Sheet
Rev. G| Page 92 of 100
8:6 PGA3[2:0] 000 Phase voltages gain selection.
000: gain = 1.
001: gain = 2.
010: gain = 4.
011: gain = 8.
100: gain = 16.
101, 110, 111: reserved. When set, the ADE7854/ADE7858/ADE7868/ADE7878 behave
like PGA3[2:0] = 000.
15:9 Reserved 000 0000 Reserved. These bits do not manage any functionality.
Table 45. CFMODE Register (Address 0xE610)
Bit
Location Bit Mnemonic Default Value Description
2:0 CF1SEL[2:0] 000
000: the CF1 frequency is proportional to the sum of total active powers on each phase
identified by Bits[2:0] (TERMSEL1[x]) in the COMPMODE register.
001: the CF1 frequency is proportional to the sum of total reactive powers on each phase
identified by Bits[2:0] (TERMSEL1[x]) in the COMPMODE register. This condition does not
have any consequence for the ADE7854.
010: the CF1 frequency is proportional to the sum of apparent powers on each phase
identified by Bits[2:0] (TERMSEL1[x]) in the COMPMODE register.
011: the CF1 frequency is proportional to the sum of fundamental active powers on each
phase identified by Bits[2:0] (TERMSEL1[x]) in the COMPMODE register.
This condition does
not have any consequence for the ADE7854, ADE7858, and ADE7868.
100: the CF1 frequency is proportional to the sum of fundamental reactive powers on each
phase identified by Bits[2:0] (TERMSEL1[x]) in the COMPMODE register.
This condition does
not have any consequence for the ADE7854, ADE7858, and ADE7868.
101, 110, 111: reserved. When set, the CF1 signal is not generated.
5:3 CF2SEL[2:0] 001
000: the CF2 frequency is proportional to the sum of total active powers on each phase
identified by Bits[5:3] (TERMSEL2[x]) in the COMPMODE register.
001: the CF2 frequency is proportional to the sum of total reactive powers on each phase
identified by Bits[5:3] (TERMSEL2[x]) in the COMPMODE register.
This condition does not
have any consequence for the ADE7854.
010: the CF2 frequency is proportional to the sum of apparent powers on each phase
identified by Bits[5:3] (TERMSEL2[x]) in the COMPMODE register.
011: the CF2 frequency is proportional to the sum of fundamental active powers on each
phase identified by Bits[5:3] (TERMSEL2[x]) in the COMPMODE register.
This condition does
not have any consequence for the ADE7854, ADE7858, and ADE7868.
100: the CF2 frequency is proportional to the sum of fundamental reactive powers on each
phase identified by Bits[5:3] (TERMSEL2[x]) in the COMPMODE register.
This condition does
not have any consequence for the ADE7854, ADE7858, and ADE7868.
101,110,111: reserved. When set, the CF2 signal is not generated.
8:6 CF3SEL[2:0] 010
000: the CF3 frequency is proportional to the sum of total active powers on each phase
identified by Bits[8:6] (TERMSEL3[x]) in the COMPMODE register.
001: the CF3 frequency is proportional to the sum of total reactive powers on each phase
identified by Bits[8:6] (TERMSEL3[x]) in the COMPMODE register.
This condition does not
have any consequence for the ADE7854.
010: the CF3 frequency is proportional to the sum of apparent powers on each phase
identified by Bits[8:6] (TERMSEL3[x]) in the COMPMODE register.
011: CF3 frequency is proportional to the sum of fundamental active powers on each phase
identified by Bits[8:6] (TERMSEL3[x]) in the COMPMODE register.
This condition does not
have any consequence for the ADE7854, ADE7858, and ADE7868.
100: CF3 frequency is proportional to the sum of fundamental reactive powers on each
phase identified by Bits[8:6] (TERMSEL3[x]) in the COMPMODE register.
This condition does
not have any consequence for the ADE7854, ADE7858, and ADE7868.
101,110,111: reserved. When set, the CF3 signal is not generated.
9 CF1DIS 1
When this bit is set to 1, the CF1 output is disabled. The respective digital to frequency
converter remains enabled even if CF1DIS = 1.
When this bit is set to 0, the CF1 output is enabled.