Datasheet
ADE9153A Data Sheet
Rev. 0 | Page 32 of 50
REGISTER INFORMATION
REGISTER SUMMARY
Table 8. Register Summary
Address Name Description
Length
(Bits)
Reset Access
0x000 AIGAIN Phase A current gain adjust. 32 0x00000000 R/W
0x001 APHASECAL Phase A phase correction factor. 32 0x00000000 R/W
0x002 AVGAIN Phase A voltage gain adjust. 32 0x00000000 R/W
0x003 AIRMS_OS Phase A current rms offset for filter-based AIRMS calculation. 32 0x00000000 R/W
0x004 AVRMS_OS Phase A voltage rms offset for filter-based AVRMS calculation. 32 0x00000000 R/W
0x005 APGAIN Phase A power gain adjust for AWATT, AVA, and AFVAR calculations. 32 0x00000000 R/W
0x006 AWATT_OS Phase A total active power offset correction for AWATT calculation. 32 0x00000000 R/W
0x007 AFVAR_OS
Phase A fundamental reactive power offset correction for AFVAR
calculation.
32 0x00000000 R/W
0x008 AVRMS_OC_OS Phase A voltage rms offset for fast rms, AVRMS_OC calculation. 32 0x00000000 R/W
0x009 AIRMS_OC_OS Phase A current rms offset for fast rms, AIRMS_OC calculation. 32 0x00000000 R/W
0x010 BIGAIN Phase B current gain adjust. 32 0x00000000 R/W
0x011 BPHASECAL Phase B correction factor. 32 0x00000000 R/W
0x013 BIRMS_OS Phase B current rms offset for filter-based BIRMS calculation. 32 0x00000000 R/W
0x019 BIRMS_OC_OS Phase B current rms offset for fast rms, BIRMS_OC calculation. 32 0x00000000 R/W
0x020 CONFIG0 DSP configuration register. 32 0x00000000 R/W
0x021 VNOM
Nominal phase voltage rms used in the calculation of apparent
power, AVA, when the VNOMA_EN bit is set in the CONFIG0 register.
32 0x00000000 R/W
0x022 DICOEFF
Value used in the digital integrator algorithm. If the integrator is
turned on, with INTEN_BI equal to 1 in the CONFIG0 register, it is
recommended to leave this register at the default value.
32 0x00000000 R/W
0x023 BI_PGAGAIN PGA gain for Current Channel B ADC. 32 0x00000000 R/W
0x030 MS_ACAL_CFG mSure autocalibration configuration register. 32 0x00000000 R/W
0x045 MS_AICC_USER
User input Current Channel A CC value for mSure initialization and
threshold calculation.
32 0x00000000 R/W
0x046 MS_BICC_USER
User input Current Channel B CC value for mSure initialization and
threshold calculation.
32 0x00000000 R/W
0x047 MS_AVCC_USER
User input Voltage Channel CC value for mSure initialization and
threshold calculation.
32 0x00000000 R/W
0x049 CT_PHASE_DELAY
Phase delay of the CT used on Current Channel B. This register is
in 5.27 format and expressed in degrees.
32 0x00000000 R/W
0x04A CT_CORNER
Corner frequency of the CT. This value is calculated from the
CT_PHASE_DELAY value.
32 0x00000000 R/W
0x04C VDIV_RSMALL
This register holds the resistance value, in Ω, of the small resistor
in the resistor divider.
32 0x00000000 R/W
0x200 AI_WAV
Instantaneous Current Channel A waveform processed by the DSP
at 4 kSPS.
32 0x00000000 R
0x201 AV_WAV
Instantaneous voltage channel waveform processed by the DSP
at 4 kSPS.
32 0x00000000 R
0x202 AIRMS Phase A filter-based current rms value updated at 4 kSPS. 32 0x00000000 R
0x203 AVRMS Phase A filter-based voltage rms value updated at 4 kSPS. 32 0x00000000 R
0x204 AWATT Phase A low-pass filtered total active power updated at 4 kSPS. 32 0x00000000 R
0x206 AVA Phase A total apparent power updated at 4 kSPS. 32 0x00000000 R
0x207 AFVAR Phase A fundamental reactive power updated at 4 kSPS. 32 0x00000000 R
0x208 APF Phase A power factor updated at 1.024 sec. 32 0x00000000 R
0x209 AIRMS_OC
Phase A current fast rms calculation; one cycle rms updated every
half cycle.
32 0x00000000 R
0x20A AVRMS_OC
Phase A voltage fast rms calculation; one cycle rms updated every
half cycle.
32 0x00000000 R
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