Datasheet

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4 GHz to 18 GHz

Divide-by-2 Prescaler

Data Sheet

ADF5000

Rev. A Document Feedback

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FEATURES

Divide-by-2 prescaler

High frequency operation: 4 GHz to 18 GHz

Integrated RF decoupling capacitors

Low power consumption

Active mode: 30 mA

Power-down mode: 17 mA

Low phase noise: −147 dBc/Hz

Single dc supply: 3.3 V compatible with ADF4xxx PLLs

Temperature range: −40°C to +105°C

Small package: 3 mm × 3 mm LFCSP

APPLICATIONS

PLL frequency range extender

Point-to-point radios

VSAT radios

Communications test equipment

GENERAL DESCRIPTION

The ADF5000 prescaler is a low noise, low power, fixed RF

divider block that can be used to divide down frequencies as

high as 18 GHz to a lower frequency suitable for input to a

PLL IC, such as the ADF4156 or the ADF4106. The ADF5000

provides a divide-by-2 function. The ADF5000 operates from

a 3.3 V supply and has differential 100 Ω RF outputs to allow

direct interface to the differential RF inputs of PLLs such as

the ADF4156 and ADF4106.

FUNCTIONAL BLOCK DIAGRAM

DIVIDE

BY 2

BIAS

ADF5000

GND

RFIN

VDDx

RFOUT

100Ω

50Ω

100Ω

1pF

3pF

1pF

09129-001

Figure 1.

Summary of content (12 pages)

PAGE 1
4 GHz to 18 GHz Divide-by-2 Prescaler ADF5000 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM APPLICATIONS CE ADF5000 BIAS VDDx 100Ω 3pF RFIN 100Ω 1pF RFOUT DIVIDE BY 2 RFOUT 1pF 50Ω 09129-001 Divide-by-2 prescaler High frequency operation: 4 GHz to 18 GHz Integrated RF decoupling capacitors Low power consumption Active mode: 30 mA Power-down mode: 17 mA Low phase noise: −147 dBc/Hz Single dc supply: 3.
PAGE 2
ADF5000 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Pin Configuration and Function Descriptions..............................5 Applications ....................................................................................... 1 Typical Performance Characteristics ..............................................6 General Description .........................................................................
PAGE 3
Data Sheet ADF5000 SPECIFICATIONS VDD1 = VDD2 = 3.3 V ± 10%, GND = 0 V; dBm referred to 50 Ω; TA = TMIN to TMAX, unless otherwise noted. The operating temperature range is −40°C to +105°C. Table 1.
PAGE 4
ADF5000 Data Sheet ABSOLUTE MAXIMUM RATINGS Table 2. Parameter VDDx to GND RFIN Operating Temperature Range Industrial (B Version) Storage Temperature Range Maximum Junction Temperature LFCSP θJA Thermal Impedance Peak Temperature Time at Peak Temperature This device is a high performance RF integrated circuit with an ESD rating of 2 kV, human body model (HBM) and is ESD sensitive. Implement proper precautions for handling and assembly. Rating −0.3 V to +3.
PAGE 5
Data Sheet ADF5000 PIN 1 INDICATOR GND 1 12 GND 11 RFOUT GND 3 TOP VIEW (Not to Scale) 10 RFOUT 9 GND GND 8 GND 5 GND 4 CE 7 ADF5000 NC 6 RFIN 2 NOTES 1. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN. 2. THE EXPOSED PADDLE MUST BE CONNECTED TO GND. 09129-002 14 VDD2 13 GND 15 VDD1 16 GND PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Figure 2. Pin Configuration Table 3. Pin Function Descriptions Pin No. 1, 3, 4, 5, 8, 9, 12, 13, 16 2 6 7 Mnemonic GND Description RF Ground.
PAGE 6
ADF5000 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS –5 0 RF OUTPUT POWER (dBm) –10 –20 –30 –40 VDD = 3.0V VDD = 3.3V VDD = 3.6V –60 0 5 –15 THIRD HARMONIC –20 FIFTH HARMONIC –25 –30 –35 20 10 15 RF INPUT FREQUENCY (GHz) 30 25 –40 2.4 VDDx (V) Figure 3. RF Input Sensitivity 20 18 3.6 3.3 3.0 2.7 09129-106 –50 09129-003 MINIMUM INPUT POWER (dBm) FIRST HARMONIC –10 Figure 6. RF Output Harmonic Content vs.
PAGE 7
Data Sheet ADF5000 EVALUATION BOARD PCB The evaluation board has four connectors as shown in Figure 8. The RF input connector (J4) is a high frequency precision SMA connector from Emerson. This connector is mechanically compatible with SMA, 3.5 mm, and 2.92 mm cables. PCB MATERIAL STACK-UP The evaluation board is built using Rogers RO4003C material (0.008 inch). RF track widths are 0.015 inch to achieve a controlled 50 Ω characteristic impedance.
PAGE 8
ADF5000 Data Sheet APPLICATION CIRCUIT The positive input pin of the OP184 is biased at half the ADF4156 charge pump supply (VP). This can be easily achieved using a simple resistor divider, ensuring sufficient decoupling close to the +IN A pin of the OP184. This configuration, in turn, allows the use of a single positive supply for the op amp.
PAGE 9
Data Sheet ADF5000 OUTLINE DIMENSIONS 0.30 0.25 0.18 0.50 BSC 13 PIN 1 INDICATOR 16 1 12 EXPOSED PAD 1.60 1.50 SQ 1.40 9 TOP VIEW 0.80 0.75 0.70 SEATING PLANE 0.45 0.40 0.35 4 8 5 0.20 MIN BOTTOM VIEW 0.05 MAX 0.02 NOM COPLANARITY 0.08 0.20 REF FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. COMPLIANT TO JEDEC STANDARDS MO-220-WEED-6. 08-16-2010-B PIN 1 INDICATOR 3.10 3.00 SQ 2.90 Figure 11.
PAGE 10
ADF5000 Data Sheet NOTES Rev.
PAGE 11
Data Sheet ADF5000 NOTES Rev.