Datasheet

ADM1171 Data Sheet
Rev. A | Page 14 of 16
threshold. The device can be reset by toggling the ON-
CLR
pin
or by manually pulling the TIMER pin low. On theADM1171-1,
the TIMER pin activates the 2 µA pull-down once the 1.3 V
threshold is reached, and continues to pull down until it reaches
the 0.2 V threshold. At this point, the 100 µA pull-down is
activated and the GATE pin is enabled. The device keeps
retrying in the manner as shown in Figure 38.
The duty cycle of this automatic retry cycle is set to the ratio of
2 µA/60 µA, which approximates 3.8% on. The value of the
timer capacitor determines the on time of this cycle. This time
is calculated as follows:
t
ON
= 1.3 × C
TIMER
/60 A
t
OFF
= 1.1 × C
TIMER
/2 A
2µA
COMP1COMP2
SHORT-
CIRCUIT
EVENT
60µA
100µA
V
TIMER
V
OUT
V
GSFET
I
RSENSE
FAULT
CYCLE
FAULT
CYCLE
0
5125-004
Figure 38. ADM1171-1 Automatic Retry During Overcurrent Fault
AUTOMATIC RETRY OR LATCHED OFF
The ADM1171 is available in two models. The ADM1171-1
has an automatic retry system whereby when a current fault is
detected, the FET is shut down after a time determined by the
timer capacitor, and it is switched on again in a controlled con-
tinuous cycle to determine if the fault remains (see Figure 38
for details). The period of this cycle is determined by the timer
capacitor at a duty cycle of 3.8% on and 96.2% off.
The ADM1171-2 model has a latch off system whereby when a
current fault is detected, the GATE is switched off after a time
determined by the timer capacitor (see Figure 39 for details).
Toggling the ON-
CLR
pin, or pulling the TIMER pin to GND
for a brief period, resets this condition.
5µA
COMP2
SHORT-
CIRCUIT
EVENT
60µA
V
TIMER
V
OUT
V
GSFET
I
RSENSE
05125-005
Figure 39. ADM1171-2 Latch Off After Overcurrent Fault
SOFT START
The inrush current profile is controlled using an external
capacitor on the soft start (SS) pin. During power-on reset, the
SS pin is held at GND. When the pass FET begins to conduct
current, a pull-up current source is initiated on the SS pin and
charges the voltage on the soft start capacitor in a linear fashion.
The current limit of the device is porportional to the voltage on
the SS pin until it reaches 1 V. When the voltage on the SS pin
reaches 1 V, the current limit reaches the normal operating
condition of V
SENSE
= 50 mV. The voltage on the SS pin continues
to rise past the 1 V level with no effect on the current limit. The
reference voltage for the GATE linear control amplifier is derived
from the soft start voltage, such that the inrush linear current
limit is defined as
I
LIMIT
= V
SS
/(20 × R
SENSE
)
This provides a limit of 50 mV across R
SENSE
when V
SS
is at 1 V.
Therefore, the value for the SS capacitor is chosen as follows:
C
SS
= I
SS
× t
where I
SS
= 10 A and t is the time required for the current limit
to ramp up.
CSOUT PIN
The ADM1171 has a current sense output pin (CSOUT). The
CSOUT pin provides an analog voltage representing the current
flowing through the sense resistor. The voltage drop across the
sense resistor, as equated by V
CC
− SENSE, is gained up by a
factor of 20 and presented on the CSOUT pin. The output
impedance of the pin is typically 14 kΩ.