Datasheet

ADM1275 Data Sheet
Rev. D | Page 6 of 48
Parameter Min Typ Max Unit Test Conditions/Comments
PWRGD PIN
Output Low Voltage, V
OL_PWRGD
0.4 V I
PWRGD
= 1 mA
1.5 V I
PWRGD
= 5 mA
VCC That Guarantees Valid Output 1 V I
SINK
= 100 μA; V
OL_PWRGD
= 0.4 V
Leakage Current
100
nA
V
PWRGD
≤ 2 V; PWRGD output high-Z
1 µA V
PWRGD
= 20 V; PWRGD output high-Z
CURRENT AND VOLTAGE MONITORING
Current Sense Absolute Error
25 mV input range; 128 sample averaging (unless
otherwise noted)
±0.2 ±0.7 % V
SENSE
= 20 mV; V
SENSE+
= 12 V; T
A
= 0°C to 65°C
±0.08 % V
SENSE
= 20 mV; V
SENSE+
= 12 V; T
A
= 25°C
±1.0 % V
SENSE
= 20 mV
±0.08 % V
SENSE
= 20 mV; T
A
= 25°C
±0.2 % V
SENSE
= 20 mV; T
A
= 0°C to 65°C
±1.0 % V
SENSE
= 20 mV; 16 sample averaging
±0.08 % V
SENSE
= 20 mV; 16 sample averaging; T
A
= 25°C
±0.2 % V
SENSE
= 20 mV; 16 sample averaging; T
A
= 0°C to 65°C
±2.8 % V
SENSE
= 20 mV; 1 sample averaging
±0.09
%
V
SENSE
= 20 mV; 1 sample averaging; T
A
= 25°C
±0.2 % V
SENSE
= 20 mV; 1 sample averaging; T
A
= 0°C to 65°C
±0.7 % V
SENSE
= 25 mV; V
SENSE+
= 12 V
±0.04 % V
SENSE
= 25 mV; V
SENSE+
= 12 V; T
A
= 25°C
±0.15 % V
SENSE
= 25 mV; V
SENSE+
= 12 V; T
A
= 0°C to 65°C
±0.75 % V
SENSE
= 20 mV; V
SENSE+
= 12 V
±0.8
%
V
SENSE
= 15 mV; V
SENSE+
= 12 V
±1.1 % V
SENSE
= 10 mV; V
SENSE+
= 12 V
±2.0 % V
SENSE
= 5 mV; V
SENSE+
= 12 V
±4.3 % V
SENSE
= 2.5 mV; V
SENSE+
= 12 V
SENSE+/VOUT Absolute Error ±1.0 % Low input range; input voltage ≥ 3 V
±1.0 % High input range; input voltage ≥ 10 V
ADC Conversion Time 250 305 µs
1 sample of voltage and current; from command
received to valid data in register
4000 4880 µs
16 samples of voltage and current averaged; from
command received to valid data in register
ADR PIN
Address Set to 00 0 0.8 V Connect to GND
Input Current for Address 00 −40 −22 μA V
ADR
= 0 V to 0.8 V
Address Set to 01 135 150 165 kΩ Resistor to GND
Address Set to 10
−1
+1
μA
No connect state; maximum leakage current allowed
Address Set to 11 2 V Connect to VCAP
Input Current for Address 11 3 10 μA
V
ADR
= 2.0 V to VCAP; must not exceed the maximum
allowable current draw from VCAP
SERIAL BUS DIGITAL INPUTS (SDA, SCL)
Input High Voltage, V
IH
1.1 V
Input Low Voltage, V
IL
0.8 V
Output Low Voltage, V
OL
0.4 V I
OL
= 4 mA
Input Leakage, I
LEAK-PIN
−10
+10
μA
−5 +5 μA Device is not powered
Nominal Bus Voltage, V
DD
2.7 5.5 V 3 V to 5 V ± 10%
Capacitance for SDA, SCL Pin, C
PIN
5 pF
Input Glitch Filter, t
SP
0 50 ns