Datasheet

ADM4850–ADM4857
Rev. 0 | Page 3 of 16
SPECIFICATIONS
V = 5 V ± 5%, T
A
= T
MIN
to T
MAX
, unless otherwise noted.
Table 2.
Parameter Min Typ Max Unit Test Conditions/Comments
DRIVER
Differential Output Voltage, V
OD
V
CC
V
R = ∞, Figure 4
1
2.0 5 V R = 50 Ω (RS-422), Figure 4
1.5 5 V R = 27 Ω (RS-485), Figure 4
1.5 5 V V
TST
= −7 V to 12 V, Figure 5
∆|V
OD
| for Complementary Output States 0.2 V R = 27 Ω or 50 Ω, Figure 4
Common-Mode Output Voltage, V
O
3 V R = 27 Ω or 50 Ω, Figure 4
∆|V
O
| for Complementary Output States 0.2 V R = 27 Ω or 50 Ω, Figure 4
Output Short-Circuit Current, V
OUT
= High −200 +200 mA −7 V < V
OUT
< +12 V
Output Short-Circuit Current, V
OUT
= Low −200 +200 mA −7 V < V
OUT
< +12 V
DRIVER INPUT LOGIC
CMOS Input Logic Threshold Low 1.4 0.8 V
CMOS Input Logic Threshold High 2.0 1.4 V
CMOS Logic Input Current (DI) ±1 µA
DE Input Resistance to GND 220 kΩ
RECEIVER
Differential Input Threshold Voltage, V
TH
−200 −125 −30 mV −7 V < V
M
< +12 V
Input Hysteresis 20 mV −7 V < V
M
< +12 V
Input Resistance (A, B) 96 150 kΩ −7 V < V
M
< +12 V
Input Current (A, B) 0.125 mA V
IN
= +12 V
−0.1 mA V
IN
= −7 V
CMOS Logic Input Current (RE)
±1 µA
CMOS Output Voltage Low 0.4 V I
OUT
= +4 mA
CMOS Output Voltage High 4.0 V I
OUT
= −4 mA
Output Short Circuit Current 7 85 mA V
OUT
= GND or V
CC
Three-State Output Leakage Current ±2 µA 0.4 V ≤ V
OUT
≤ 2.4 V
POWER SUPPLY CURRENT
I (115 kbps Options) 5 µA
DE = 0 V,
RE = V
CC
(shutdown)
36 60 µA
DE = 0 V,
RE = 0 V
100 160 µA DE = V
CC
I (500 kbps Options) 5 µA
DE = 0 V,
RE = V
CC
(shutdown)
80 120 µA
DE = 0 V,
RE = 0 V
120 200 µA DE = V
CC
I (2.5 Mbps Options) 5 µA
DE = 0 V,
RE = V
CC
(shutdown)
250 400 µA
DE = 0 V,
RE = 0 V
320 500 µA DE = V
CC
I (10 Mbps Options) 5 µA
DE = 0 V,
RE = V
CC
(shutdown)
250 400 µA
DE = 0 V,
RE = 0 V
320 500 µA DE = V
CC
1
Guaranteed by design.