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REV. A

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Microprocessor

Supervisory Circuits

ADM690–ADM695

FEATURES

Superior Upgrade for MAX690–MAX695

Specified Over Temperature

Low Power Consumption (5 mW)

Precision Voltage Monitor

Reset Assertion Down to 1 V V

Low Switch On-Resistance 1.5 V Normal,

20 V in Backup

High Current Drive (100 mA)

Watchdog Timer—100 ms, 1.6 s, or Adjustable

600 nA Standby Current

Automatic Battery Backup Power Switching

Extremely Fast Gating of Chip Enable Signals (5 ns)

Voltage Monitor for Power Fail

APPLICATIONS

Microprocessor Systems

Computers

Controllers

Intelligent Instruments

Automotive Systems

GENERAL DESCRIPTION

The ADM690–ADM695 family of supervisory circuits offers

complete single chip solutions for power supply monitoring and

battery control functions in microprocessor systems. These

functions include µP reset, backup battery switchover, watchdog

timer, CMOS RAM write protection, and power failure warn-

ing. The complete family provides a variety of configurations to

satisfy most microprocessor system requirements.

The ADM690, ADM692 and ADM694 are available in 8-pin

DIP packages and provide:

1. Power-on reset output during power-up, power-down and

brownout conditions. The

RESET output remains opera-

tional with V

as low as 1 V.

2. Battery backup switching for CMOS RAM, CMOS

microprocessor or other low power logic.

3. A reset pulse if the optional watchdog timer has not been

toggled within a specified time.

4. A 1.3 V threshold detector for power fail warning, low battery

detection, or to monitor a power supply other than +5 V.

The ADM691, ADM693 and ADM695 are available in 16-pin

DIP and small outline packages and provide three additional

functions.

1. Write protection of CMOS RAM or EEPROM.

2. Adjustable reset and watchdog timeout periods.

3. Separate watchdog timeout, backup battery switchover, and

low V

status outputs.

The ADM690–ADM695 family is fabricated using an advanced

epitaxial CMOS process combining low power consumption

(5 mW), extremely fast Chip Enable gating (5 ns) and high reli-

ability.

RESET assertion is guaranteed with V

as low as 1 V.

In addition, the power switching circuitry is designed for mini-

mal voltage drop thereby permitting increased output current

drive of up to 100 mA without the need for an external pass

transistor.

FUNCTIONAL BLOCK DIAGRAMS

4.65V

WATCHDOG

TRANSITION DETECTOR

1.3V

ADM691

ADM693

ADM695

OUT

BATT

WATCHDOG

INPUT (WDI)

POWER FAIL

INPUT (PFI)

VOLTAGE DETECTOR = 4.65V (ADM691, ADM695)

4.40V (ADM693)

POWER FAIL

OUTPUT (PFO)

RESET

WATCHDOG

TIMER

RESET &

WATCHDOG

TIMEBASE

RESET

GENERATOR

BATT ON

OSC IN

OSC SEL

WATCHDOG

OUTPUT (WDO)

RESET

LOW LINE

OUT

4.65V

RESET

GENERATOR

WATCHDOG

TRANSITION DETECTOR

(1.6s)

1.3V

ADM690

ADM692

ADM694

OUT

BATT

WATCHDOG

INPUT (WDI)

POWER FAIL

INPUT (PFI)

VOLTAGE DETECTOR = 4.65V (ADM690, ADM694)

4.40V (ADM692)

RESET PULSE WIDTH = 50ms (ADM690, ADM692)

200ms (ADM694)

POWER FAIL

OUTPUT (PFO)

RESET

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 617/329-4700 Fax: 617/326-8703

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Summary of content (16 pages)

PAGE 1
a FEATURES Superior Upgrade for MAX690–MAX695 Specified Over Temperature Low Power Consumption (5 mW) Precision Voltage Monitor Reset Assertion Down to 1 V V CC Low Switch On-Resistance 1.5 V Normal, 20 V in Backup High Current Drive (100 mA) Watchdog Timer—100 ms, 1.
PAGE 2
ADM690–ADM695–SPECIFICATIONS (VCC = Full Operating Range, VBATT = +2.8 V, TA = TMIN to TMAX unless otherwise noted) Parameter Max Units 4.75 4.5 5.5 5.5 V V 2.0 2.0 VCC – 0.05 VCC – 0.025 VCC – 0.5 VCC – 0.25 VBATT – 0.05 VBATT – 0.02 1 0.6 4.25 4.0 V V V V V mA µA –0.1 –1.0 +0.02 +0.
PAGE 3
ADM690–ADM695 Parameter OSCILLATOR OSC IN Input Current OSC SEL Input Pull-Up Current OSC IN Frequency Range OSC IN Frequency with External Capacitor Min Typ Max ±2 5 0 250 4 Units Test Conditions/Comments µA µA kHz kHz OSC SEL = 0 V OSC SEL = 0 V, COSC = 47 pF NOTE 1 WDI is a three level input which is internally biased to 38% of V CC and has an input impedance of approximately 125 kΩ. Specifications subject to change without notice.
PAGE 4
ADM690–ADM695 PIN FUNCTION DESCRIPTION Mnemonic Function VCC Power Supply Input: +5 V Nominal. VBATT Backup Battery Input. Connect to Ground if a backup battery is not used. VOUT Output Voltage, VCC or VBATT is internally switched to VOUT depending on which is at the highest potential. VOUT can supply up to 100 mA to power CMOS RAM. Connect VOUT to VCC if VOUT and VBATT are not used. GND 0 V. Ground reference for all signals. RESET Logic Output. RESET goes low if 1.
PAGE 5
ADM690–ADM695 PIN CONFIGURATIONS VBATT 1 VOUT 2 V CC GND 3 4 BATT ON 5 16 RESET ADM691 ADM693 ADM695 TOP VIEW (Not to Scale) LOW LINE 6 OSC IN 15 RESET 14 WDO VOUT 13 CE V IN 12 CE OUT 11 WDI 7 OSC SEL 8 10 PFO 9 PFI 1 CC 2 GND 3 PFI 4 ADM690 ADM692 ADM694 TOP VIEW (Not to Scale) 8 VBATT 7 RESET 6 WDI 5 PFO PRODUCT SELECTION GUIDE Part Number Nominal Reset Time Nominal VCC Reset Threshold Nominal Watchdog Timeout Period Battery Backup Switching Base Drive Ext PNP
PAGE 6
ADM690–ADM695 POWER FAIL RESET OUTPUT Watchdog Timer RESET RESET is an active low output which provides a RESET signal to the Microprocessor whenever VCC is at an invalid level. When VCC falls below the reset threshold, the RESET output is forced low. The nominal reset voltage threshold is 4.65 V (ADM690/ ADM691/ADM694/ADM695) or 4.4 V (ADM692/ADM693). The watchdog timer circuit monitors the activity of the microprocessor in order to check that it is not stalled in an indefinite loop.
PAGE 7
ADM690–ADM695 Table I. ADM691, ADM693, ADM695 Reset Pulse Width and Watchdog Timeout Selections OSC SEL OSC IN Watchdog Timeout Period Immediately Normal After Reset Low Low Floating or High Floating or High External Clock Input External Capacitor Low Floating or High 1024 CLKS 260 ms × C/47 pF 100 ms 1.6 s Reset Active Period 4096 CLKS 1.04 s × C/47 pF 1.6 s 1.
PAGE 8
ADM690–ADM695 CE Gating and RAM Write Protection (ADM691/ADM693/ ADM695) Power Fail Warning Comparator The ADM691/ADM693/ADM695 products include memory protection circuitry which ensures the integrity of data in memory by preventing write operations when VCC is at an invalid level. There are two additional pins, CEIN and CEOUT, which may be used to control the Chip Enable or Write inputs of CMOS RAM. When VCC is present, CEOUT is a buffered replica of CEIN, with a 5 ns propagation delay.
PAGE 9
Typical Performance Curves–ADM690–ADM695 5.00 2.80 VCC = 5V TA = +25°C 4.95 VCC = 0V VBATT = +2.8V TA = +25°C 2.79 A4 3.36 V 1V 1V 100 VOUT – V VOUT – V 90 4.90 SLOPE = 1.5Ω 2.78 SLOPE = 20Ω 4.85 10 2.77 4.80 0% 2.76 0 20 40 60 80 100 0 200 IOUT – mA 400 600 IOUT – µA 800 1000 Figure 9. VOUT vs. IOUT Battery Backup Figure 8. VOUT vs. IOUT Normal Operation 1.303 Figure 10. Reset Output Voltage vs. Supply Voltage 4.70 53 1.302 1.301 1.300 1.
PAGE 10
ADM690–ADM695 +APPLICATION INFORMATION Increasing the Drive Current If the continuous output current requirements at VOUT exceed 100 mA or if a lower VCC–VOUT voltage differential is desired, an external PNP pass transistor may be connected in parallel with the internal transistor. The BATT ON output (ADM691/ ADM693/ADM695) can directly drive the base of the external transistor. When PFO is low, resistor R3 sinks current from the summing junction at the PFI pin.
PAGE 11
ADM690–ADM695 +5V INPUT POWER VBATT CONTROL INPUT* VCC PFO PFI D1 LOW BATTERY SIGNAL TO µP I/O PIN 10MΩ BATTERY ADM69x OSC SEL ADM69x D2 OSC IN 20kΩ OPTIONAL TEST LOAD CEIN 10MΩ CE OUT FROM µP I/O PIN APPLIES TEST LOAD TO BATTERY *LOW = INTERNAL TIMEOUT HIGH = EXTERNAL TIMEOUT Figure 21b. Programming the Watchdog Input Figure 20.
PAGE 12
ADM690–ADM695 R =(VCC – 50 mV)/1 µA +5V Note that the resistor will discharge the battery slightly. With a VCC supply of 4.5 V, a suitable resistor is 4.3 MΩ. With a 3 V battery this will draw around 700 nA. This will be negligible in most cases. R1 PFI R2 VBATT µP POWER VCC VOUT ADM690 ADM692 ADM694 CMOS RAM POWER 0.1µF µP SYSTEM µP RESET RESET BATTERY R + ADM69x VBATT PFO µP NMI WDI I/O LINE BATTERY GND Figure 23a. ADM690/ADM692/ADM694 Typical Application Circuit A Figure 22b.
PAGE 13
ADM690–ADM695 RAM Write Protection INPUT POWER +5V 0.1µF 0.1µF 3V BATTERY VCC VBATT R1 PFI GND R2 The ADM691/ADM693/ADM695 CEOUT line drives the Chip Select inputs of the CMOS RAM. CEOUT follows CEIN as long as VCC is above the 4.65 V (4.4 V for ADM693) reset threshold. BATT ON VOUT CMOS RAM CEOUT ADM691 ADM693 ADM695 ADDRESS DECODE CE IN A0–A15 Watchdog Timer WDI NC OSC IN OSC SEL If VCC falls below the reset threshold, CEOUT goes high, independent of the logic level at CEIN.
PAGE 14
ADM690–ADM695 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 8-Pin Plastic DIP (N-8) 8 5 0.280 (7.11) 0.240 (6.10) PIN 1 1 4 0.325 (8.25) 0.300 (7.62) 0.430 (10.92) 0.348 (8.84) 0.060 (1.52) 0.015 (0.38) 0.210 (5.33) MAX 0.195 (4.95) 0.115 (2.93) 0.150 (3.81) MIN 0.160 (4.06) 0.115 (2.93) 0.100 (2.54) BSC 0.022 (0.558) 0.014 (0.356) 0.015 (0.381) 0.008 (0.204) SEATING PLANE 0.070 (1.77) 0.045 (1.15) 16-Lead Plastic DIP (N-16) 16 9 0.280 (7.11) 0.240 (6.10) PIN 1 1 8 0.325 (8.
PAGE 15
ADM690–ADM695 16-Lead Cerdip (Q-16) 9 16 0.310 (7.87) 0.220 (5.59) PIN 1 1 8 0.840 (21.34) MAX 0.060 (1.52) 0.015 (0.38) 0.200 (5.08) MAX 0.150 (3.81) MIN SEATING PLANE 0.022 (0.558) 0.014 (0.356) 0.100 (2.54) BSC 0.320 (8.13) 0.290 (7.37) 0.015 (0.381) 0.008 (0.204) 0.070 (1.78) 0.30 (0.76) 16-Lead SOIC (R-16) 16 9 0.419 (10.65) 0.299 (7.60) 1 8 0.030 (0.75) 0.413 (10.50) 0.012 (0.3) 0.104 (2.65) 0.05 (1.27) REF REV. A Downloaded from Arrow.com. 0.019 (0.49) 0.013 (0.32) –15– 0.
PAGE 16
C1782a–2–6/96 PRINTED IN U.S.A. –16– Downloaded from Arrow.com.