Datasheet

ADM823/ADM824/ADM825 Data Sheet
Rev. D | Page 6 of 12
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
ADM823
T
O
P
VIEW
(Not to Scale)
RESET
1
GND
2
MR
3
V
CC
WDI
5
4
04534-002
RESET
1
GND
2
RESET
3
V
CC
WDI
5
4
04534-003
ADM824
TOP VIEW
(Not to Scale)
ADM825
TOP VIEW
(Not to Scale)
RESET
1
GND
2
RESET
3
V
CC
MR
5
4
04534-004
Figure 2. ADM823 Pin Configuration Figure 3. ADM824 Pin Configuration Figure 4. ADM825 Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
RESET
Active Low, Push-Pull Reset Output. Asserted whenever V
CC
is below the reset threshold, V
TH
.
2
GND
Ground.
3
MR
(ADM823) Manual Reset Input. This is an active low input which, when forced low for at least 1 µs, generates
a reset. It features a 52 kΩ internal pull-up.
RESET (ADM824/ADM825) Active High, Push-Pull Reset Output.
4 WDI (ADM823/ADM824) Watchdog Input. Generates a reset if the voltage on the pin remains low or high for the duration
of the watchdog timeout. The timer is cleared if a logic transition occurs on this pin or if a reset is
generated.
MR
(ADM825) Manual Reset Input. This is an active low input which, when forced low for at least 1 µs, generates
a reset. It features a 52 kΩ internal pull-up.
5 V
CC
Power Supply Voltage Being Monitored.