Datasheet

ADM8690/ADM8691/ADM8695 Data Sheet
Rev. C | Page 16 of 24
ALTERNATE WATCHDOG INPUT DRIVE CIRCUITS
The watchdog feature can be enabled and disabled under
program control by driving WDI with a three-state buffer (see
Figure 28). When three-stated, the WDI input floats, thereby
disabling the watchdog timer.
WDI
WATCHDOG
STROBE
ADM8690/
ADM8691/
ADM8695
CONTROL
INPUT
00093-028
Figure 28. Enabling and Disabling the Watchdog Input
This circuit is not entirely foolproof, and it is possible for a
software fault to erroneously three-state the buffer, preventing
the ADM8690/ADM8691/ADM8695 from detecting that the
microprocessor is no longer operating correctly. In most cases,
a better method is to extend the watchdog period rather than
disable the watchdog.
For the ADM8691/ADM8695, the watchdog period can be
extended under program control using the circuit shown in
Figure 29. When the control input is high, the OSC SEL pin is
low and the watchdog timeout is set by the external capacitor.
A 0.01 μF capacitor sets a watchdog timeout delay of 100 sec.
When the control input is low, the OSC SEL pin is driven high,
selecting the internal oscillator. The 100 ms or the 1.6 sec
period is chosen, depending on which diode is used, as shown
in Figure 29. With D1 inserted, the internal timeout is set to
100 ms; with D2 inserted, the timeout is set to 1.6 sec.
OSC SEL
OSC IN
CONTROL
INPUT
1
1
LOW = INTERNAL TIMEOUT
HIGH = EXTERNAL TIMEOUT
D1
D2
00093-029
ADM8691/
ADM8695
Figure 29. Extending the Watchdog Period