Datasheet

Data Sheet ADP1822
Rev. D | Page 15 of 24
When f
ESRZ
is approximately the same as the switching frequency,
the square-root sum of the squares of the two ripples applies, or
[ ]
( ) ( )
2
2
8
Δ
)(ΔΔ






+≅
SW
OUT
L
L
OUT
fC
I
ESRIV
(6)
SELECTING THE MOSFETS
The choice of MOSFET directly affects the dc-to-dc converter
performance. The MOSFET must have low on resistance to
reduce I
2
R losses and low gate charge to reduce transition losses.
In addition, the MOSFET must have low thermal resistance to
ensure that the power dissipated in the MOSFET does not result
in excessive MOSFET die temperature.
The high-side MOSFET carries the load current during on time
and carries all the transitions losses of the converter. Typically,
the lower the MOSFET on resistance, the higher the gate charge
and vice versa. Therefore, it is important to choose a high-side
MOSFET that balances the two losses. The conduction loss of
the high-side MOSFET is determined by
( ) ( )








≅
IN
OUT
ONLOADC
V
V
RIP
2
(7)
where:
P
C
is the conduction power loss.
R
ON
is the MOSFET on resistance.
The gate-charging loss is approximated by
( )( )( )
SWGPVCC
T
fQVP
≅
(8)
where:
P
T
is the gate-charging loss power.
V
PVCC
is the gate driver supply voltage.
Q
G
is the MOSFET total gate charge.
f
SW
is the converter switching frequency.
The high-side MOSFET transition loss is approximated by
( )
2
SW
FR
LOAD
IN
SW
fttIV
P
×+××
=
(9)
where:
P
SW
is the high-side MOSFET switching loss power.
t
R
is the MOSFET rise time.
t
F
is the MOSFET fall time.
The total power dissipation of the high-side MOSFET is the
sum of all the previous losses, or
( ) ( ) ( )
SW
T
CHS
PPPP ++≅
(10)
where P
HS
is the total high-side MOSFET power loss.
The low-side MOSFET does not carry the transition losses but
does carry the inductor current when the high-side MOSFET
is off. For high input and low output voltages, the low-side
MOSFET carries the current most of the time, and therefore to
achieve high efficiency, it is critical to optimize the low-side
MOSFET for low on resistance. In some cases, where the power
loss exceeds the MOSFET rating, or lower resistance is required
than is available in a single MOSFET, connect multiple low-side
MOSFETs in parallel. The equation for low-side MOSFET
power loss is
( ) ( )






−≅
IN
OUT
ONLOADLS
V
V
RIP 1
2
(11)
where:
P
LS
is the low-side MOSFET on resistance.
R
ON
is the total on resistance of the low-side MOSFET(s).
If multiple low-side MOSFETs are used in parallel, use the
parallel combination of the on resistances for determining R
ON
to solve this equation.
SETTING THE CURRENT LIMIT
The internal current-limit circuit measures the voltage across
the low-side MOSFET to determine the load current. When the
low-side MOSFET current exceeds the current limit, the high-
side MOSFET is not allowed to turn on until the current drops
below the current-limit.
The current limit is set through the current-limit resistor, R
CL
.
The current-sense pin, CSL, sources 50 µA through R
CL
. This
creates an offset voltage of resistance of R
CL
multiplied by the
50 µA CSL current. When the low-side MOSFET voltage is
equal to or greater than the offset voltage, the ADP1822 is in
current limit mode and prevents additional on-time cycles.
Choose the current-limit resistor by the equation
( ) ( )
μA42
ONWC
LPK
CL
RI
R =
(12)
where:
I
LPK
is the peak inductor current.
R
ONWC
is the worst-case (maximum) low-side MOSFET on
resistance.
The worst-case, low-side MOSFET on resistance can be found
in the MOSFET data sheet. Note that MOSFETs typically
increase on resistance with increasing die temperature. To
determine the worst-case MOSFET on resistance, calculate the
worst-case MOSFET temperature (based on the MOSFET
power loss) and multiply by the ratio between the typical on
resistance at that temperature and the on resistance at 25°C as
listed in the MOSFET data sheet.
In addition, the ADP1822 offers a technique for implementing
a current-limit foldback in the event of a short circuit with the
use of an additional resistor, as shown in Figure 18. The resistor
R
LO
is largely responsible for setting the foldback current limit
during a short circuit, and R
HI
is mainly responsible for setting
up the normal current limit. R
LO
is lower than R
HI
.
These current-limit sense resistors can be calculated as
( )( )
μA42
ONWCPKFOLDBACK
LO
RI
R =
(13)