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5 A Evaluation Board for

Step-Down DC-to-DC Controller

EVAL-ADP1828LC

Rev. 0

Evaluation boards are only intended for device evaluation and not for production purposes.

Evaluation boards are supplied “as is” and without warranties of any kind, express, implied, or

statutory including, but not limited to, any implied warranty of merchantability or fitness for a

particular purpose. No license is granted by implication or otherwise under any patents or other

intellectual property by application or use of evaluation boards. Information furnished by Analog

Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog

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from its use. Analog Devices reserves the right to change devices or specifications at any time

without notice. Trademarks and registered trademarks are the property of their respective owners.

Evaluation boards are not authorized to be used in life support devices or systems.

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EVALUATION BOARD DESCRIPTION

This data sheet describes the design, operation, and test results

of the ADP1828 5 A evaluation board. The input range for this

evaluation board is 5.5 V to 13.2 V, and the output voltage is 1.8 V

with a maximum load current of 5 A. For this design, a switching

frequency (f

) of 600 kHz is chosen to achieve a good balance

between efficiency and the sizes of the power components.

ADP1828 DEVICE DESCRIPTION

The ADP1828 is a synchronous PWM voltage mode buck

controller. It drives an all N-channel power stage to regulate an

output voltage as low as 0.6 V to 85% of the input voltage and is

sized to handle large MOSFETs for point-of-load regulators. The

ADP1828 is ideal for a wide range of high power applications,

such as DSP and processor core I/O power, as well as general-

purpose power in telecommunications, medical imaging, PC,

gaming, and industrial applications. It operates from an input

voltage of 3 V to 18 V with an internal LDO that generates a 5 V

output for a V

of 5.5 V to 18 V.

The ADP1828 operates at a pin-selectable, fixed switching

frequency of either 300 kHz or 600 kHz, or at any frequency

between 300 kHz and 600 kHz if a resistor is used. The

frequency can also be synchronized to an external clock up to

2× the switching frequency. The clock output can be used for

synchronizing the ADP1828 or another part, such as the

ADP1829, thus eliminating the need for an external clock

source. The ADP1828 includes soft start protection (to limit

inrush current from the input supply during startup), reverse

current protection during soft start for a precharged output,

voltage tracking, power good, as well as an adjustable lossless

current-limit scheme utilizing external MOSFET sensing. The

ADP1828 is offered in a 20-lead QSOP package.

DIGITAL PICTURE OF THE BOARD

ADP1828

DISK DRIVE POWER CONNECTOR

VOUT TERMIINAL

GND TERMINAL

ACTIVE AREA

DUAL FET Si7958DP

GND TERMINAL

VIN TERMINAL

06906-001

Figure 1. ADP1828 5 A Evaluation Board

Summary of content (12 pages)

PAGE 1
5 A Evaluation Board for Step-Down DC-to-DC Controller EVAL-ADP1828LC EVALUATION BOARD DESCRIPTION This data sheet describes the design, operation, and test results of the ADP1828 5 A evaluation board. The input range for this evaluation board is 5.5 V to 13.2 V, and the output voltage is 1.8 V with a maximum load current of 5 A. For this design, a switching frequency (fSW) of 600 kHz is chosen to achieve a good balance between efficiency and the sizes of the power components.
PAGE 2
EVAL-ADP1828LC TABLE OF CONTENTS Evaluation Board Description......................................................... 1 Switching Noise and Overshoot Reduction...............................4 ADP1828 Device Description......................................................... 1 Compensation Design ..................................................................4 Digital Picture of the Board ............................................................ 1 Test Results ...................................
PAGE 3
EVAL-ADP1828LC COMPONENT DESIGN For information about selecting power components and calculating component values, see the ADP1828 data sheet. the effective capacitance of the ceramic capacitor decreases as the bias voltage increases. INPUT CAPACITOR MOSFET SELECTION Ceramic capacitors have very low ESR (in the order of 1 mΩ or 2 mΩ) and have large ripple current rating. For a 5 A output with a VIN of 6 V to13.2 V and a VOUT of 1.8 V, three 22 μF ceramic capacitors (22 μF/16 V/X5R/1210) are adequate.
PAGE 4
EVAL-ADP1828LC CHF RFF VOUT CFF RZ CI RTOP RBOT FB EA SWITCHING NOISE AND OVERSHOOT REDUCTION An RC snubber can be added between SW and PGND to reduce noise and ringing at the SW node and at the drains of the external MOSFETs. In this design, an RC snubber is added with an RSNUB of 3.01 Ω and a CSNUB of 1.2 nF. Gate resistors can be added to reduce overshoot voltage at the drains of the MOSFETs. For more information, see the ADP1828 data sheet.
PAGE 5
EVAL-ADP1828LC TEST RESULTS T T SW VOUT (AC-COUPLED) 1 1 2 INPUT RIPPLES 1A TO 5A STEP LOAD OUTPUT RIPPLES 3 CH2 50.0mV BW M 1.00µs A CH1 3.60V BW CH1 100mV M 200µs BW A CH4 3.60A CH4 2.00A Ω 06906-006 CH1 10.0V CH3 10.0mV 06906-003 4 Figure 6. Load Transient, VIN = 12 V, Load = 1 A to 5 A Figure 3. Output Ripple, VIN = 12 V, Load = 5 A 95 T VIN = 4V 90 VIN (5V TO 9V) VIN = 5.5V 85 EFFICIENCY (%) 80 75 VIN = 12V 70 65 VOUT (AC-COUPLED) 60 1 VOUT = 1.
PAGE 6
EVAL-ADP1828LC 1.806 1.797 1.804 1.796 1.794 VOUT (V) 1.798 1.796 1.794 1.793 1.792 1.791 1.790 1.792 5A LOAD 1.789 1.790 0 1 2 3 4 LOAD (A) 5 6 Figure 9. Load Regulation, VIN = 12 V 1.787 5 7 9 VIN (V) Figure 10. Line Regulation Rev. 0 | Page 6 of 12 11 13 06906-010 1.788 06906-009 VOUT (V) 1.800 1.788 2A LOAD 1.795 1.
PAGE 7
EVAL-ADP1828LC EVALUATION BOARD OPERATING INSTRUCTIONS 1. 2. 3. 4. 5. 6. 7. Connect Jumper JP3 to the on position to enable the ADP1828. Do not connect Jumper J7 (VIN to VREG). Connect Jumper JP2 (FREQ) to the 600 kHz position. Connect Jumper J8 (SYNC) to GND (that is, if SYNC is not used). If SYNC is used, connect SYNC to an external clock or CLKOUT from another ADP1828.
PAGE 8
EVAL-ADP1828LC Table 4. Miscellaneous Information Parameter Switching Frequency, fSW Dual Power MOSFETs: Q1A and Q1B Inductor VREG and VIN Snubber Circuit Gate Resistors Capacitor C17 Voltage Divider Comment The switching frequency, fSW, is set to 600 kHz (Jumper JP2) on the evaluation board. If a different fSW is needed, the compensation and the power components need to be recalculated.
PAGE 9
Rev. 0 | Page 9 of 12 100K R9 TP4 FB Figure 11. ADP1828 5 A Evaluation Board Schematic SGND R7 10K 20K R8 422 ohm R11 7.5k R10 1 nF C8 3.9nF C6 33pF C7 TRK TP1 SGND C9 1.0uF SGND TP10 VREG 100K R4 C15 0.1uF SGND VREG SGND 100K R6 C2 150nF SS JP3 OPEN FREQ SYNC EN IN VREG GND COMP FB TRK SS U1 TP9 1 2 3 4 5 6 7 8 9 10 ON EN OFF JP2 CL KOUT CL KSET BST DH SW CSL PGND DL PV PGOOD ADP1828 600khz FREQ 300khz R13 SGND TP5 BST C16 1.
PAGE 10
EVAL-ADP1828LC 06906-012 06906-015 EVALUATION BOARD LAYOUT 06906-013 06906-016 Figure 15. Third Layer (GND Layer) Figure 12. Silkscreen Layer Figure 13. Top Layer 06906-014 Figure 16. Bottom Layer Figure 14. Second Layer Rev.
PAGE 11
EVAL-ADP1828LC ORDERING INFORMATION BILL OF MATERIALS Table 5. Component Listing Item 1 Qty 3 Designator C10, C11, C12 Description Capacitor, ceramic, 22 μF, 16 V, X5R, 1210 Manufacturer Murata Part No. GRM32ER61C226KE20 2 1 C4 Capacitor, ceramic, 100 μF, 6.3 V, X5R, 1210 Murata GRM32ER60J107ME20 3 1 C5 Capacitor, ceramic, 47 μF, 6.3 V, X5R, 1206 Murata GRM31CR60J476ME20 4 1 C2 Capacitor, ceramic, 150 nF, 16 V, X7R, 0603 Vishay VJ0603Y154KXJA 5 1 C15 Capacitor, ceramic, 0.1 μF, 6.
PAGE 12
EVAL-ADP1828LC ESD CAUTION ORDERING GUIDE Model ADP1828LC-EVALZ1 1 Description Evaluation Board Z = RoHS Compliant Part. ©2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. EB06906-0-8/07(0) Rev.