Datasheet

ADP2302/ADP2303 Data Sheet
Rev. A | Page 16 of 28
APPLICATIONS INFORMATION
ADIsimPower DESIGN TOOL
The ADP2302/ADP2303 are supported by the ADIsimPower
design tool set. ADIsimPower is a collection of tools that produce
complete power designs optimized for a specific design goal.
The tools enable the user to generate a full schematic and bill of
materials, and calculate performance in minutes. ADIsimPower
can optimize designs for cost, area, efficiency, and parts count
while taking into consideration the operating conditions and
limitations of the IC and all real external components. For
more information about ADIsimPower design tools, refer to
www.analog.com/ADIsimPower. The tool set is available from
this website, and users can request an unpopulated board
through the tool.
PROGRAMMING OUTPUT VOLTAGE
ADP2302/ADP2303 have an adjustable version where the output
voltage is programmed through an external resistive divider, as
shown in Figure 45. Suggested resistor values for the typical
output voltage setting are listed in Table 6. The output voltages
are calculated using the following equation:









BOT
TOP
OUT
R
R
V 1V800.0
where:
V
OUT
is the output voltage.
R
TOP
is the feedback resistor from V
OUT
to FB.
R
BOT
is the feedback resistor from FB to GND.
V
OUT
R
TOP
R
BOT
ADP2302/
ADP2303
FB
08833-043
Figure 45. Programming the Output Voltage Using a Resistive Voltage Divider
Table 6. Suggested Values for Resistive Voltage Divider
V
OUT
(V) R
TOP
(kΩ), ±1% R
BOT
(kΩ), ±1%
1.2 10 20
1.5 10 11.3
1.8 12.7 10.2
2.5 21.5 10.2
3.3 31.6 10.2
5.0 52.3 10
VOLTAGE CONVERSION LIMITATIONS
There are both lower and upper output voltage limitations for a
given input voltage due to the minimum on time, the minimum
off time, and the bootstrap dropout voltage.
The lower limit of the output voltage is constrained by the
controllable minimum on time, which can be as high as 170 ns
for the worst case. By considering the variation of both the switch-
ing frequency and the input voltage, the equation for the lower
limit of the output voltage is
V
OUT(min)
= t
MIN-ON
× f
SW(max)
× (V
IN(max)
+ V
D
) − V
D
where:
V
IN(max)
is the maximum input voltage.
f
SW(max)
is the maximum switching frequency for the worst case.
t
MIN-ON
is the minimum controllable on time.
V
D
is the diode forward drop.
The upper limit of the output voltage is constrained by the mini-
mum controllable off time, which can be as high as 280 ns in
ADP2302/ADP2303 for the worst case. By considering the
variation of both the switching frequency and the input voltage,
the equation for the upper limit of the output voltage is
V
OUT(max)
= (1 − t
MIN-OFF
× f
SW(max)
) × (V
IN(min)
+ V
D
) − V
D
where:
V
IN(min)
is the minimum input voltage.
f
SW(max)
is the maximum switching frequency for the worst case.
V
D
is the diode forward drop.
t
MIN-OFF
is the minimum controllable off time.
In addition, the bootstrap circuit limits the minimum input voltage
for the desired output due to the internal dropout voltage. To
attain stable operation at light loads and ensure proper startup for
the prebiased condition, the ADP2302/ADP2303 require the
voltage difference between the input voltage and the regulated
output voltage (or between the input voltage and the prebias
voltage) to be greater than 2.1 V for the worst case. If the voltage
difference is smaller, the bootstrap circuit relies on some minimum
load current to charge the boost capacitor for startup. Figure 46
shows the typical required minimum input voltage vs. load current
for the 3.3 V output voltage.
3.5
3.7
3.9
4.1
4.3
4.5
4.7
4.9
5.1
5.3
1 10 100 1000
V
IN
(V)
OUPTUT CURRENT (mA)
FOR START UP
WHILE IN
OPERATION
08833-146
Figure 46. Minimum Input Voltage vs. Load Current
Based on three conversion limitations (the minimum on time,
the minimum off time, and the bootstrap dropout voltage),
Figure 47 shows the voltage conversion limitations.