Datasheet

ADP2370/ADP2371 Data Sheet
Rev. C | Page 24 of 32
M2.00µs A CH2 –57.0mV
T 20.0%
09531-079
CH1 5.00V
B
W
CH3 200mA Ω
B
W
CH4 5.00V
B
W
CH2 50.0mV
B
W
SW
V
OUT
INDUCTOR CURRENT
SYNC
1
2
3
4
Figure 79. SYNC Transient 800 kHz to 1.2 MHz
POWER GOOD
The ADP2370/ADP2371 power-good (PG) output indicates the
state of the monitored output voltage. The PG function is an active
high, open-drain output, requiring an external pull-up resistor that
is typically supplied from the I/O supply rail, as shown in Figure 1.
When the sensed output voltage is below 87% of its nominal value,
the PG pin is held low. When the sensed output voltage rises above
92% of the nominal level, the PG line is pulled high after t
RESET
.
The PG pin remains high when the sensed output voltage is
above 92% of the nominal output voltage level.
The typical PG delay when the buck is in PWM mode is 20 μs.
Figure 80 shows the typical PG operation during startup. Figure 81
shows the PG operation when there is a large load transient that
causes the output voltage to fall just below the PG threshold.
When not using the PG function, remove the pull-up resistor
and leave the PG pin either open or shorted to ground.
M40.0µs A CH3 3.40V
T 10.00%
09531-080
CH1 500mV
B
W
CH3 5.00V
B
W
CH2 1.00V
B
W
V
OUT
PG
ENABLE
3
2
1
Figure 80. Typical PG Timing at Startup
M1.00µs A CH3 740mA
T 10.00%
09531-081
CH1 500mV
B
W
CH3 500mAΩ
B
W
CH2
1.00V
B
W
V
OUT
PG
LOAD CURRENT
1
2
3
Figure 81. Typical PG Timing with 200 mA to 1100 mA Load Transient