Datasheet

RedyKit User Guide UG-038
Rev. B | Page 3 of 4
EVALUATION BOARD SCHEMATIC AND LAYOUT
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PLACE CLOSE TO V
IN
PV
IN
VOUT
SW2
PGND
L1
1.5µH
SW1
PVIN
FB
AGND
VIN
SYNC
EN
TOP VIEW
(Not to scale)
U1
ADP2504
1
2
3
4
5
10
9
8
7
6
TP1
1
TP2
1
C1
6.3V
10µF
C2
6.3V
10µF
C3
6.3V
10µF
JP1
VOUT
2
1
C4
0.1µF
R3
0Ω
PV
IN
J5
1
2
3
J4
VOUT
J3
PGND
J2
VOUT
J1
PGND
R1
1MΩ
PV
IN
SYNC
EN
J6
1
2
3
R2
1MΩ
Figure 3. Evaluation Board Schematic
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Figure 4. Evaluation Board Layout