Datasheet

Data Sheet ADP5065
Rev. D | Page 23 of 40
I
2
C INTERFACE
The ADP5065 includes an I
2
C-compatible serial interface for
control of the charging and for a readback of system status
registers. The I
2
C chip address is 0x28 in write mode and 0x29
in read mode.
Register values are reset to the default values, when the supply
voltage at the VINx pin falls below the V
VIN_OK
falling voltage
threshold. The I
2
C registers are also reset when the battery is
disconnected and V
IN
is 0 V.
See Figure 34 for an example of the I
2
C write sequence to a
single register. The subaddress content selects which one of the
five ADP5065 registers is written to first. The ADP5065 sends
an acknowledgement to the master after the 8-bit data byte has
been written. The ADP5065 increments the subaddress
automatically and starts receiving a data byte to the following
register until the master sends an I
2
C stop as shown in Figure 35.
Figure 36 shows the I
2
C read sequence of a single register.
ADP5065 sends the data from the register denoted by the
subaddress and increments the subaddress automatically,
sending data from the next register until the master sends an
I
2
C stop condition as shown in Figure 37.
SUBADDRESS
CHIP ADDRESS
ST0010100 0 0 0
SP
ADP5065 RECEIVES
DATA
0
ADP5065 ACK ADP5065 ACK ADP5065 ACK
0 = WRITE MASTER STOP
09370-034
Figure 34. I
2
C Single Register Write Sequence
CHIP ADDRESS
ADP5065 ACK ADP5065 ACK ADP5065 ACK ADP5065 ACK ADP5065 ACK
SUBADDRESS
REGISTER N
ADP5065 RECEIVES
DATA TO REGISTER N
ADP5065 RECEIVES
DATA TO REGISTER N + 1
ADP5065 RECEIVES
DATA TO LAST REGISTER
ST0010100 0 0 0 SP0 0 0
0 = WRITE MASTER STOP
09370-035
Figure 35. I
2
C Multiple Register Write Sequence
ADP5065 ACK ADP5065 ACK ADP5065 ACK
ADP5065 NO ACK
CHIP ADDRESS SUBADDRESS CHIP ADDRESS ADP5065 SENDS DATA
ST0010100 0000000110ST0010100 0 1SP0 1
0 = WRITE
1 = READ
09370-036
Figure 36. I
2
C Single Register Read Sequence
ADP5065 ACK ADP5065 ACK ADP5065 ACK
MASTER ACK MASTER ACK MASTER ACK
CHIP ADDRESS SUBADDRESS
REGISTER N
CHIP ADDRESS ADP5065 SENDS
DATA OF REGISTER N
ADP5065 SENDS
DATA OF REGISTER
N + 1
ADP5065 SENDS
DATA OF LAST
REGISTER
S
T
0010100 0 0 0
S
P
0
0 1
S
T
0010100 01
0
0 = WRITE
1 = READ MASTER STOP
09370-037
Figure 37. I
2
C Multiple Register Read Sequence