Datasheet

Data Sheet ADP5065
Rev. D | Page 5 of 40
Parameter
Symbol
Min
Typ
Max
Unit
Test Conditions/Comments
BATTERY DETECTION
Sink Current
I
SINK
13
20
34
mA
Source Current
I
SOURCE
7
10
13
mA
Battery Threshold
Low
V
BATL
1.8
1.9
2.0
V
High V
BATH
3.4 V
No Battery Threshold
V
NOBAT
3.3
V
V
TRM
≥ 3.7 V, valid after charge complete (see
Figure 38)
3.0
V
V
TRM
< 3.7 V, valid after charge complete (see
Figure 38)
Battery Detection Timer
t
BATOK
333
ms
TIMERS
Start Charging Delay Timer t
START
1 sec
Trickle Charge Timer
t
TRK
60
min
Fast Charge Timer t
CHG
600 min
Charge Complete Timer
t
END
7.5
min
V
BAT_SNS
= V
TRM
, I
CHG
< I
END
Deglitch Timer
t
DG
31
ms
Applies to V
TRK
, V
RCH
, I
END
, V
DEAD
, V
VIN_OK
Watchdog Timer
1
t
WD
32 sec
Safety Timer t
SAFE
36 40 44 min
Battery Node Short Timer
1
t
BAT_SHR
30
sec
LOGIC INPUTS
Maximum Voltage on Digital Inputs V
DIN_MAX
5.5 V
Maximum Logic Low Input Voltage
V
IL
0.5
V
Applies to SCL, SDA, TRK_EXT, IIN_EXT
Minimum Logic High Input Voltage
V
IH
1.2
V
Applies to SCL, SDA, TRK_EXT, IIN_EXT
Pull-Down Resistance 215 350 610 kΩ Applies to TRK_EXT, IIN_EXT
1
These values are programmable via I
2
C. Values are given with default register values.
2
The output current during charging can be limited by I
BUS
or by the isothermal charging mode.
3
Programmable via external resistor programming, if required.
4
JEITA can be enabled or disabled in I
2
C.
RECOMMENDED INPUT AND OUTPUT CAPACITANCE
Table 2.
Parameter Min Typ Max Unit Test Conditions/Comments
CAPACITANCE
VINx Capacitance 1.0 µF Effective capacitance
CFILT Pin Total External Capacitance 2.0 4.7 5.0 μF Effective capacitance
ISO_Sx Pin Total Capacitance 10 50 µF Effective capacitance
ISO_Bx Pin Total Capacitance 10 µF Effective capacitance