2/40-Bit IEEE Floating-Point DSP Microprocessor Specification Sheet

ADSP-21020
REV. C
–14–
Interrupts
K/B/T Grade K/B/T Grade B/T Grade K Grade
20 MHz 25 MHz 30 MHz 33.3 MHz Frequency Dependency*
Parameter Min Max Min Max Min Max Min Max Min Max Unit
Timing Requirement:
t
SIR
IRQ3-0 Setup before CLKIN High 38 31 25 23 38 + 3DT/4 ns
t
HIR
IRQ3-0 Hold after CLKIN High 0 0 0 0 ns
t
IPW
IRQ3-0 Pulse Width 55 45 38 35 t
CK
+ 5 ns
NOTE
*DT = t
CK
– 50 ns
Meeting setup and hold guarantees interrupts will be latched in that cycle. Meeting the pulse width is not necessary if the setup and hold is met. Likewise, meeting the
setup and hold is not necessary if the pulse width is met. See the Hardware Configuration chapter of the ADSP-21020 User’s Manual for interrupt servicing informa-
tion.
CLKIN
t
SIR
IRQ3-0
t
HIR
t
IPW
Figure 5. Interrupts
Timer
K/B/T Grade K/B/T Grade B/T Grade K Grade
20 MHz 25 MHz 30 MHz 33.3 MHz Frequency Dependency*
Parameter Min Max Min Max Min Max Min Max Min Max Unit
Switching Characteristic:
t
DTEX
CLKIN High to TIMEXP 24 24 24 24 ns
NOTE
*DT = t
CK
– 50 ns
CLKIN
t
DTEX
TIMEXP
t
DTEX
Figure 6. TIMEXP