Datasheet

ADSP-21060/ADSP-21060L/ADSP-21062/ADSP-21062L/ADSP-21060C/ADSP-21060LC
Rev. F | Page 3 of 64 | March 2008
CONTENTS
Summary ............................................................... 1
Key Features—Processor Core .................................... 1
Processor Features (Continued) .................................. 2
Parallel Computations .............................................. 2
Up to 4M Bit On-Chip SRAM ..................................... 2
Off-Chip Memory Interfacing ..................................... 2
DMA Controller ...................................................... 2
Host Processor Interface to 16- and 32-Bit Microprocessors 2
Multiprocessing ....................................................... 2
Serial Ports ............................................................. 2
Contents ................................................................ 3
Revision History ...................................................... 3
General Description ................................................. 4
SHARC Family Core Architecture ............................ 4
Memory and I/O Interface Features ........................... 5
Development Tools ............................................... 8
Evaluation Kit ...................................................... 9
Designing an Emulator-Compatible DSP Board (Target) 9
Additional Information .......................................... 9
Pin Function Descriptions ........................................ 10
Target Board Connector for EZ-ICE Probe ................ 13
ADSP-21060/ADSP-21062 Specifications ..................... 15
Operating Conditions (5 V) ................................... 15
Electrical Characteristics (5 V) ................................ 15
Internal Power Dissipation (5 V) ............................. 16
External Power Dissipation (5 V) ............................ 17
ADSP-21060L/ADSP-21062L Specifications ................. 18
Operating Conditions (3.3 V) ................................. 18
Electrical Characteristics (3.3 V) ............................. 18
Internal Power Dissipation (3.3 V) .......................... 19
External Power Dissipation (3.3 V) .......................... 20
Absolute Maximum Ratings ................................... 20
ESD Caution ...................................................... 21
Package Marking Information ................................ 21
Timing Specifications ........................................... 21
Test Conditions .................................................. 47
Environmental Conditions .................................... 50
225-Ball PBGA Ball Configurations ............................ 51
240-Lead MQFP_PQ4/CQFP Pin Configurations ........... 53
Outline Dimensions ................................................ 55
Surface-Mount Design .......................................... 60
Ordering Guide ..................................................... 61
REVISION HISTORY
3/08—Rev. E to Rev. F
Revised Absolute Maximum Ratings ............................ 20
Corrected model package descriptions.
See Ordering Guide.................................................. 61