Datasheet

ADSP-21161N
Rev. C | Page 41 of 60 | January 2013
Figure 25. DMA Handshake
CLKIN
t
SDRC
DATA
DATA
t
WDR
t
SDRC
t
DMARH
t
DMARLL
t
HDGC
t
WDGH
t
DDGL
t
VDATDGH
t
DATDRH
t
DATRDGH
t
HDATIDG
t
DGWRL
t
DGWRH
t
DGWRR
t
DGRDL
t
DRDGH
t
DGRDR
t
SDATDGL
(EXTERNAL DEVICE TO EXTERNAL MEMORY)
(EXTERNAL MEMORY TO EXTERNAL DEVICE)
TRANSFERS BETWEEN ADSP-21161N
INTERNAL MEMORY AND EXTERNAL DEVICE
TRANSFERS BETWEEN EXTERNAL DEVICE AND
EXTERNAL MEMORY
1
(EXTERNAL HANDSHAKE MODE)
t
DDGHA
ADDRESS
MSx
t
DADGH
t
WDGL
(FROM EXTERNAL DRIVE TO ADSP-21161N)
(FROM ADSP-2116x TO EXTERNAL DRIVE)
t
DGWR
DMARx
DMAGx
WR
RD
1
MEMORY READ BUS MASTER, MEMORY WRITE BUS MASTER, OR SYNCHRONOUS READ/WRITE BUS MASTER
TIMING SPECIFICATIONS FOR ADDR23–0, RD, WR, MS3-0 AND ACK ALSO APPLY HERE.