Datasheet

Rev. C | Page 54 of 60 | January 2013
ADSP-21161N
OUTPUT DRIVE CURRENTS
Figure 34 shows typical I-V characteristics for the output driv-
ers of the ADSP-21161N. The curves represent the current drive
capability of the output drivers as a function of output voltage.
TEST CONDITIONS
The DSP is tested for output enable, disable, and hold time.
Output Enable Time
Output pins are considered to be enabled when they have made
a transition from a high impedance state to the point when they
start driving. The output enable time t
ENA
is the interval from
the point when a reference signal reaches a high or low voltage
level to the point when the output has reached a specified high
or low trip point, as shown in the Output Enable/Disable dia-
gram (Figure 35). If multiple pins (such as the data bus) are
enabled, the measurement value is that of the first pin to start
driving.
Output Disable Time
Output pins are considered to be disabled when they stop driv-
ing, go into a high-impedance state, and start to decay from
their output high or low voltage. The time for the voltage on the
bus to decay by V is dependent on the capacitive load, C
L
and
the load current, I
L
. This decay time can be approximated by the
following equation:
t
DECAY
= (C
L
V)/I
L
The output disable time t
DIS
is the difference between t
MEASURED
and t
DECAY
as shown in Figure 35. The time t
MEASURED
is the inter-
val from when the reference signal switches to when the output
voltage decays V from the measured output high or output low
voltage. t
DECAY
is calculated with test loads C
L
and I
L
, and with
V equal to 0.5 V.
Example System Hold Time Calculation
To determine the data output hold time in a particular system,
first calculate t
DECAY
using the equation given above. Choose V
to be the difference between the ADSP-21161N’s output voltage
and the input threshold for the device requiring the hold time. A
typical V will be 0.4 V. C
L
is the total bus capacitance (per data
line), and I
L
is the total leakage or three-state current (per data
line). The hold time will be t
DECAY
plus the minimum disable
time (i.e., t
DATRWH
for the write cycle).
Figure 34. Typical Drive Currents
SWEEP (V
DDEXT
) VOLTAGE – V
60
–10
–40
0 3.50.5 1.0 1.5 2.0 2.5 3.0
50
0
–20
–30
30
10
40
20
–50
–60
L
O
A
D
(
V
D
D
E
X
T
)
C
U
R
R
E
N
T
–
m
A
V
DDEXT
= 3.47V, –40°C
V
DDEXT
= 3.3V, +25°C
V
DDEXT
= 3.13V, +105°C
V
DDEXT
= 3.13V, +105°C
V
DDEXT
= 3.47V, –40°C
V
DDEXT
= 3.3V, +25°C
80
–80
Figure 35. Output Enable/Disable
Figure 36. Equivalent Device Loading for AC
Measurements (Includes All Fixtures)
Figure 37. Voltage Reference Levels for AC
Measurements (Except Output Enable/Disable)
REFERENCE
SIGNAL
t
DIS
OUTPUT STARTS DRIVING
V
OH
(MEASURED) – ⌬V
V
OL
(MEASURED) + ⌬V
t
MEASURED
V
OH
(MEASURED)
V
OL
(MEASURED)
2.0V
1.0V
V
OH
(MEASURED)
V
OL
(MEASURED)
HIGH IMPEDANCE STATE.
TESTCONDITIONS CAUSETHIS
VOLTAGE TO BE APPROXIMATELY 1.5V.
OUTPUT STOPS DRIVING
t
ENA
t
DECAY
1.5V
30pF
TO
OUTPUT
PIN
50⍀
INPUT
OR
OUTPUT
1.5V 1.5V