Datasheet

ADSP-21261/ADSP-21262/ADSP-21266
Rev. G | Page 31 of 48 | December 2012
Table 32. Serial Ports—External Late Frame Sync
Parameter Min Max Unit
Switching Characteristics
t
DDTLFSE
Dat a D el ay f ro m Late Ex te rnal Transmi t F S o r Ex ternal Re ce ive FS wi th
MCE = 1, MFD = 0
1
7ns
t
DDTENFS
Data Enable for MCE = 1, MFD = 0
1
0.5 ns
1
The t
DDTLFSE
and t
DDTENFS
parameters apply to left-justified sample pair mode as well as DSP serial mode, and MCE = 1, MFD = 0.
Figure 22. External Late Frame Sync
1
1
This figure reflects changes made to support left-justified sample pair mode.
DRIVE SAMPLE
EXTERNAL RECEIVE FS WITH MCE = 1, MFD = 0
2ND BIT
DAI_P20–1
(SCLK)
DAI_P20–1
(FS)
DAI_P20–1
(DATA CHANNEL
A/B)
1ST BIT
DRIVE
t
DDTE/I
t
HDTE/I
t
DDTLFSE
t
DDTENFS
t
SFSE/I
DRIVE SAMPLE
LATE EXTERNAL TRANSMIT FS
2ND BIT
DAI_P20–1
(SCLK)
DAI_P20–1
(FS)
DAI_P20–1
(DATA CHANNEL
A/B)
1ST BIT
DRIVE
t
DDTE/I
t
HDTE/I
t
DDTLFSE
t
DDTENFS
t
SFSE/I
t
HFSE/I
t
HFSE/I