Datasheet

ADSP-21371
Interrupts
The following timing specification applies to the FLAG0,
FLAG1, and FLAG2 pins when they are configured as IRQ0
,
IRQ1
, and IRQ2 interrupts as well as the DAI_P20-1 and
DPI_P14-1 pins when they are configured as interrupts.
Table 17. Interrupts
Parameter Min Max Unit
Timing Requirement
t
IPW
IRQx Pulse Width 2 × t
PCLK
+2 ns
DAI_P20 - 1
DPI_P14
- 1
FLAG2
- 0
(IRQ2
- 0)
t
IPW
Figure 9. Interrupts
Core Timer
The following timing specification applies to FLAG3 when it is
configured as the core timer (CTIMER).
Table 18. Core Timer
Parameter Min Max Unit
Switching Characteristic
t
WCTIM
CTIMER Pulse Width 4 × t
PCLK
– 1 ns
FLAG3
(CTIMER)
t
WCTIM
Figure 10. Core Timer
Timer PWM_OUT Cycle Timing
The following timing specification applies to Timer0 and
Timer1 in PWM_OUT (pulse-width modulation) mode. Timer
signals are routed to the DPI_P14–1 pins through the DPI SRU.
Therefore, the timing specifications provided below are valid at
the DPI_P14–1 pins.
Table 19. Timer PWM_OUT Timing
Parameter Min Max Unit
Switching Characteristic
t
PWMO
Timer Pulse Width Output 2 × t
PCLK
– 2 2 × (2
31
– 1) × t
PCLK
ns
DPI_ P14 - 1
(TIM ER1
- 0)
t
PWMO
Figure 11. Timer PWM_OUT Timing
Rev. 0 | Page 22 of 48 | June 2007