Datasheet

ADSP-21371
Timer WDTH_CAP Timing
The following timing specification applies to timer0, and
timer1, and in WDTH_CAP (pulse width count and capture)
mode. Timer signals are routed to the DPI_P14–1 pins through
the SRU. Therefore, the timing specification provided below is
valid at the DPI_P14–1 pins.
Table 20. Timer Width Capture Timing
Parameter Min Max Unit
Timing Requirement
t
PWI
Timer Pulse Width 2 × t
PCLK
2 ×(2
31
– 1) × t
PCLK
ns
DPI_P14 - 1
(TIMER1-0)
t
PWI
Figure 12. Timer Width Capture Timing
Pin to Pin Direct Routing (DAI and DPI)
For direct pin connections only (for example DAI_PB01_I to
DAI_PB02_O).
Table 21. DAI Pin to Pin Routing
Parameter Min Max Unit
Timing Requirement
t
DPIO
Delay DAI/DPI Pin Input Valid to DAI Output Valid 1.5 10 ns
DAI_Pn
DPI_Pn
DAI_pm
DPI_Pm
t
DPIO
Figure 13. DAI Pin to Pin Direct Routing
Rev. 0 | Page 23 of 48 | June 2007