Datasheet

Rev. I | Page 20 of 64 | August 2013
ADSP-BF531/ADSP-BF532/ADSP-BF533
SPECIFICATIONS
Component specifications are subject to change
without notice.
OPERATING CONDITIONS
Parameter Conditions Min Nominal Max Unit
V
DDINT
Internal Supply Voltage
1
1
The regulator can generate V
DDINT
at levels of 0.85 V to 1.2 V with –5% to +10% tolerance, 1.25 V with –4% to +10% tolerance, and 1.3 V with –0% to +10% tolerance.
Nonautomotive 400 MHz and 500 MHz speed grade models
2
2
See Ordering Guide on Page 63.
0.8 1.2 1.45 V
V
DDINT
Internal Supply Voltage
1
Nonautomotive 533 MHz speed grade models
2
0.8 1.25 1.45 V
V
DDINT
Internal Supply Voltage
1
600 MHz speed grade models
2
0.8 1.30 1.45 V
V
DDINT
Internal Supply Voltage
1
Automotive 400 MHz speed grade models
2
0.95 1.2 1.45 V
V
DDINT
Internal Supply Voltage
1
Automotive 533 MHz speed grade models
2
0.95 1.25 1.45 V
V
DDEXT
External Supply Voltage
3
3
When V
DDEXT
< 2.25 V, on-chip voltage regulation is not supported.
Nonautomotive grade models
2
1.75 1.8/3.3 3.6 V
V
DDEXT
External Supply Voltage Automotive grade models
2
2.7 3.3 3.6 V
V
DDRTC
Real-Time Clock
Power Supply Voltage
Nonautomotive grade models
2
1.75 1.8/3.3 3.6 V
V
DDRTC
Real-Time Clock
Power Supply Voltage
Automotive grade models
2
2.7 3.3 3.6 V
V
IH
High Level Input Voltage
4, 5
4
Applies to all input and bidirectional pins except CLKIN.
5
The ADSP-BF531/ADSP-BF532/ADSP-BF533 processors are 3.3 V tolerant (always accepts up to 3.6 V maximum V
IH
), but voltage compliance (on outputs, V
OH
) depends on
the input V
DDEXT
, because V
OH
(maximum) approximately equals V
DDEXT
(maximum). This 3.3 V tolerance applies to bidirectional pins (DATA15–0, TMR2–0, PF15–0, PPI3–0,
RSCLK1–0, TSCLK1–0, RFS1–0, TFS1–0, MOSI, MISO, SCK) and input only pins (BR
, ARDY, PPI_CLK, DR0PRI, DR0SEC, DR1PRI, DR1SEC, RX, RTXI, TCK, TDI, TMS,
TRST, CLKIN, RESET, NMI, and BMODE1–0).
V
DDEXT
=1.85 V 1.3 V
V
IH
High Level Input Voltage
4, 5
V
DDEXT
=Maximum 2.0 V
V
IHCLKIN
High Level Input Voltage
6
6
Applies to CLKIN pin only.
V
DDEXT
=Maximum 2.2 V
V
IL
Low Level Input Voltage
7
7
Applies to all input and bidirectional pins.
V
DDEXT
=1.75 V +0.3 V
V
IL
Low Level Input Voltage
7
V
DDEXT
=2.7 V +0.6 V
T
J
Junction Temperature 160-Ball Chip Scale Ball Grid Array (CSP_BGA) @ T
AMBIENT
= 0°C to +70°C 0 +95 °C
T
J
Junction Temperature 160-Ball Chip Scale Ball Grid Array (CSP_BGA) @ T
AMBIENT
= –40°C to +85°C –40 +105 °C
T
J
Junction Temperature 160-Ball Chip Scale Ball Grid Array (CSP_BGA) @ T
AMBIENT
= –40°C to +105°C –40 +125 °C
T
J
Junction Temperature 169-Ball Plastic Ball Grid Array (PBGA) @ T
AMBIENT
= –40°C to +105°C –40 +125 °C
T
J
Junction Temperature 169-Ball Plastic Ball Grid Array (PBGA) @ T
AMBIENT
= –40°C to +85°C –40 +105 °C
T
J
Junction Temperature 176-Lead Quad Flatpack (LQFP) @ T
AMBIENT
= –40°C to +85°C –40 +100 °C