Datasheet

Rev. I | Page 40 of 64 | August 2013
ADSP-BF531/ADSP-BF532/ADSP-BF533
General-Purpose I/O Port F Pin Cycle Timing
Universal Asynchronous Receiver-Transmitter
(UART) Ports—Receive and Transmit Timing
For information on the UART port receive and transmit opera-
tions, see the ADSP-BF533 Blackfin Processor Hardware
Reference.
Table 34. General-Purpose I/O Port F Pin Cycle Timing
V
DDEXT
= 1.8 V V
DDEXT
= 2.5 V/3.3 V
Parameter Min Max Min Max Unit
Timing Requirement
t
WFI
GPIO Input Pulse Width t
SCLK
+ 1 t
SCLK
+ 1 ns
Switching Characteristic
t
GPOD
GPIO Output Delay from CLKOUT Low 6 6 ns
Figure 29. GPIO Cycle Timing
CLKOUT
GPIO OUTPUT
GPIO INPUT
t
WFI
t
GPOD