Datasheet
ADT75
Rev. 0 | Page 15 of 24
Table 11.
Bit Function
D0
Shutdown
Shutdown Bit. Setting this bit to 1 puts the ADT75 into shutdown mode. All circuitry except the SMBus/I
2
C interface is powered
down. To power up the part again, write 0 to this bit.
This bit selects between comparator and interrupt mode.
D1 Over Temperature Interrupt Modes
0 Comparator mode
D1
Cmp/Int
1 Interrupt mode
This bit selects the output polarity of the OS/ALERT pin.
D2 OS/ALERT Pin Polarity
0 Active low
D2
OS/ALERT
1 Active high
These two bits set the number of overtemperature faults that occur before setting the OS/ALERT pin. This helps to avoid false
triggering due to temperature noise.
D [4:3] Overtemperature Fault Queue
00 1 fault (Default)
01 2 faults
10 4 faults
D4:D3
Fault
Queue
11 6 faults
One-shot Mode. Setting this bit puts the part into one-shot mode. In this mode, the part is normally powered down until a
0x04 is written to the address pointer register; then a conversion is performed, and the part returns to power down.
D5 One-Shot Mode
0 Normal mode; powered up and converting every 100 ms
D5
One-Shot
1 One-shot mode
D6
Reserved
Reserved. Write 0 to this bit.
Interrupt Mode Only. Enable SMBus alert function mode. This bit can enable the ADT75 to support the SMBus alert function
when the interrupt mode is selected (D1 = 1).
D7 OS/SMBus Alert Mode
0 Disable SMBus alert function. The OS/ALERT pin behaves as an OS pin when this bit status is selected.
D7
OS/SMBus
Alert
Mode
1 Enable SMBus alert function.
T
HYST
Setpoint Register
This 16-bit read/write register stores the temperature hysteresis limit for the two interrupt modes. The temperature limit is stored in twos
complement format with the MSB being the temperature sign bit. When reading from this register the eight MSBs are read first and then
the eight LSBs are read. The default setting has the T
HYST
limit at +75°C. The control register settings are the default settings on power up.
MSB
LSB
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
0 1 0 0 1 0 1 1 0 0 0 0 N/A N/A N/A N/A
T
OS
Setpoint Register
This 16-bit read/write register stores the overtemperature limit value for the two interrupt modes. The temperature limit is stored in twos
complement format with the MSB being the temperature sign bit. When reading from this register, the eight MSBs are read first and then
the eight LSBs are read. The default setting has the T
OS
limit at +80°C. The control register settings are the default settings on power up.
MSB
LSB
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
0 1 0 1 0 0 0 0 0 0 0 0 N/A N/A N/A N/A