Datasheet

Data Sheet ADuC7019/20/21/22/24/25/26/27/28/29
Rev. F | Page 47 of 104
Table 18. ADCCON MMR Bit Designations
Bit Value Description
15:13 Reserved.
12:10 ADC clock speed.
000 fADC/1. This divider is provided to obtain
1 MSPS ADC with an external clock <41.78 MHz.
001 fADC/2 (default value).
010 fADC/4.
011 fADC/8.
100 fADC/16.
101
fADC/32.
9:8
ADC acquisition time.
00 Two clocks.
01 Four clocks.
10 Eight clocks (default value).
11 16 clocks.
7 Enable start conversion.
Set by the user to start any type of conversion
command. Cleared by the user to disable a
start conversion (clearing this bit does not
stop the ADC when continuously converting).
6 Reserved.
5 ADC power control.
Set by the user to place the ADC in normal
mode (the ADC must be powered up for at least
5 μs before it converts correctly). Cleared by the
user to place the ADC in power-down mode.
4:3
Conversion mode.
00 Single-ended mode.
01 Differential mode.
10 Pseudo differential mode.
11 Reserved.
2:0 Conversion type.
000 Enable
CONV
START
pin as a conversion input.
001 Enable Timer1 as a conversion input.
010 Enable Timer0 as a conversion input.
011 Single software conversion. Sets to 000 after
conversion (note that Bit 7 of ADCCON MMR
should be cleared after starting a single
software conversion to avoid further
conversions triggered by the
CONV
START
pin).
100 Continuous software conversion.
101 PLA conversion.
Other Reserved.
Table 19. ADCCP Register
Name Address Default Value Access
ADCCP 0xFFFF0504 0x00 R/W
ADCCP is an ADC positive channel selection register. This
MMR is described in Table 20.
Table 20. ADCCP
1
MMR Bit Designation
Bit Value Description
7:5 Reserved.
4:0 Positive channel selection bits.
00000 ADC0.
00001 ADC1.
00010 ADC2.
00011 ADC3.
00100 ADC4.
00101
ADC5.
00110 ADC6.
00111 ADC7.
01000 ADC8.
01001 ADC9.
01010
ADC10.
01011 ADC11.
01100 DAC0/ADC12.
01101 DAC1/ADC13.
01110 DAC2/ADC14.
01111 DAC3/ADC15.
10000 Temperature sensor.
10001 AGND (self-diagnostic feature).
10010 Internal reference (self-diagnostic feature).
10011 AV
DD
/2.
Others Reserved.
1
ADC and DAC channel availability depends on the part model. See Ordering
Guide for details.
Table 21. ADCCN Register
Name Address Default Value Access
ADCCN 0xFFFF0508 0x01 R/W
ADCCN is an ADC negative channel selection register. This
MMR is described in Table 22.