Datasheet
Data Sheet ADuC7124/ADuC7126
Rev. C | Page 45 of 108
for serial downloading via the I
2
C. A USB-to-I
2
C download
dongle can be purchased from Analog Devices, Inc. This board
connects to the USB port of a PC and to the I
2
C port of the
ADuC7126. The part number is USB-I2C/LIN-CONV-Z.
The AN-806 Application Note describes the protocol for serial
downloading via the I
2
C in more detail.
JTAG Access
The JTAG protocol uses the on-chip JTAG interface to facilitate
code download and debug.
To access the part via the JTAG interface, the P0.0/BM pin must
be set high.
When debugging, user code should not write to the P0.1, P0.2,
and P0.3 pins. If user code toggles any of these pins, JTAG debug
pods are not able to connect to the ADuC7124/ADuC7126.
If this happens, mass erase the part using the UART/I
2
C
downloader.
FLASH/EE MEMORY SECURITY
The 126 kB of Flash/EE memory available to the user can be
read and write protected. Bit 31 of the FEE0PRO/FEE0HID
MMR protects the 126 kB from being read through JTAG and in
UART programming mode. The other 31 bits of this register
protect writing to the Flash/EE memory; each bit protects four
pages, that is, 2 kB. Write protection is activated for all access types.
FEE1PRO and FEE1HID, similarly, protect the second 64 kB
block. All 32 bits of this are used to protect four pages at a time.
Three Levels of Protection
• Protection can be set and removed by writing directly into
FEExHID MMR. This protection does not remain after reset.
• Protection can be set by writing into FEExPRO MMR. It
takes effect only after a save protection command (0x0C)
and a reset. The FEExPRO MMR is protected by a key to
avoid direct access. The key is saved once and must be
entered again to modify FEExPRO. A mass erase sets the
key back to 0xFFFF but also erases all the user code.
• Flash can be permanently protected by using the FEExPRO
MMR and a particular key value of 0xDEADDEAD.
Entering the key again to modify the FEExPRO register is
not allowed.
Sequence to Write the Key
1. Write the bit in FEExPRO corresponding to the page to be
protected.
2. Enable key protection by setting Bit 6 of FEExMOD (Bit 5
must equal 0).
3. Write a 32-bit key in FEExADR and FEExDAT.
4. Run the write key command 0x0C in FEExCON; wait for
the read to be successful by monitoring FEExSTA.
5. Reset the part.
To remove or modify the protection, the same sequence is used
with a modified value of FEExPRO. If the key chosen is the
value 0xDEAD, the memory protection cannot be removed. Only a
mass erase unprotects the part, but it also erases all user code.
The sequence to write the key is illustrated in the following
example (this protects writing Page 4 to Page 7 of the Flash):
FEExPRO=0xFFFFFFFD; //Protect Page 4 to
Page 7
FEExMOD=0x48; //Write key enable
FEExADR=0x1234; //16 bit key value
FEExDAT=0x5678; //16 bit key value
FEExCON= 0x0C; //Write key command
The same sequence should be followed to protect the part
permanently with FEExADR = 0xDEAD and FEExDAT =
0xDEAD.
FLASH/EE CONTROL INTERFACE
Table 37. FEE0STA Register
Name Address Default Value Access
FEE0STA 0xFFFFF800 0x0000 R
Table 38. FEE0MOD Register
Name Address Default Value Access
FEE0MOD 0xFFFFF804 0x80 R/W
Table 39. FEE0CON Register
Name Address Default Value Access
FEE0CON 0xFFFFF808 0x00 R/W
Table 40. FEE0DAT Register
Name Address Default Value Access
FEE0DAT 0xFFFFF80C 0xXXXX R/W
FEE0DAT is a 16-bit data register.
Table 41. FEE0ADR Register
Name Address Default Value Access
FEE0ADR 0xFFFFF810 0x0000 R/W
FEE0ADR is a 16-bit address register.
Table 42. FEE0SGN Register
Name Address Default Value Access
FEE0SGN 0xFFFFF818 0xFFFFFF R
FEE0SGN is a 24-bit code signature.
Table 43. FEE0PRO Register
Name Address Default Value Access
FEE0PRO 0xFFFFF81C 0x00000000 R/W
FEE0PRO provides protection following subsequent reset MMR.
It requires a software key (see Table 56).
Table 44. FEE0HID Register
Name Address Default Value Access
FEE0HID 0xFFFFF820 0xFFFFFFFF R/W
FEE0HID provides immediate protection MMR. It does not
require any software keys (see Table 56).