Inc. Computer Hardware User Manual

REV. B
ADuC812
–54–
Parameter Min Typ Max Unit Figure
SPI SLAVE MODE TIMING (CPHA = 1)
t
SS
SS to SCLOCK Edge 0 ns 59
t
SL
SCLOCK Low Pulsewidth 330 ns 59
t
SH
SCLOCK High Pulsewidth 330 ns 59
t
DAV
Data Output Valid after SCLOCK Edge 50 ns 59
t
DSU
Data Input Setup Time before SCLOCK Edge 100 ns 59
t
DHD
Data Input Hold Time after SCLOCK Edge 100 ns 59
t
DF
Data Output Fall Time 10 25 ns 59
t
DR
Data Output Rise Time 10 25 ns 59
t
SR
SCLOCK Rise Time 10 25 ns 59
t
SF
SCLOCK Fall Time 10 25 ns 59
t
SFS
SS High after SCLOCK Edge 0 ns 59
MISO
MOSI
SCLOCK
(CPOL=1)
SCLOCK
(CPOL=0)
t
SH
t
SR
t
SF
t
DAV
t
DF
t
DR
MSB
LSB
t
SFS
t
SS
SS
BIT 6 – 1
BIT 6 – 1
t
SL
LSB IN
MSB IN
t
DSU
t
DHD
Figure 58. SPI Slave Mode Timing (CPHA = 1)