Datasheet

Data Sheet ADuM1200/ADuM1201
Rev. K | Page 15 of 28
ELECTRICAL CHARACTERISTICS—MIXED 5 V/3 V, 125°C OPERATION
All voltages are relative to the respective ground; 5 V/3 V operation: 4.5 V ≤ V
DD1
≤ 5.5 V, 3.0 V ≤ V
DD2
≤ 3.6 V. 3 V/5 V operation; all
minimum/maximum specifications apply over the entire recommended operating range, unless otherwise noted; all typical specifications
are at T
A
= 25°C; V
DD1
= 5.0 V, V
DD2
= 3.0 V; this applies to ADuM1200W and ADuM1201W automotive grade products.
Table 6.
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
DC SPECIFICATIONS
Input Supply Current per Channel,
Quiescent
I
DDI (Q)
0.50 0.6 mA
Output Supply Current per Channel,
Quiescent
I
DDO (Q)
0.11 0.20 mA
ADuM1200W, Total Supply Current,
Two Channels
1
DC to 2 Mbps
V
DD1
Supply Current I
DD1 (Q)
1.1 1.4 mA DC to 1 MHz logic signal freq.
V
DD2
Supply Current I
DD2 (Q)
0.2 0.6 mA DC to 1 MHz logic signal freq.
10 Mbps (TRZ and URZ Grades Only)
V
DD1
Supply Current I
DD1 (10)
4.3 5.5 mA 5 MHz logic signal freq.
V
DD2
Supply Current
I
DD2 (10)
0.7
1.1
mA
5 MHz logic signal freq.
25 Mbps (URZ Grade Only)
V
DD1
Supply Current
I
DD1 (25)
10
13
mA
12.5 MHz logic signal freq.
V
DD2
Supply Current I
DD2 (25)
1.5 2.0 mA 12.5 MHz logic signal freq.
ADuM1201W, Total Supply Current,
Two Channels
1
DC to 2 Mbps
V
DD1
Supply Current I
DD1 (Q)
0.8 1.1 mA DC to 1 MHz logic signal freq.
V
DD2
Supply Current I
DD2 (Q)
0.4 0.8 mA DC to 1 MHz logic signal freq.
10 Mbps (TRZ and URZ Grades Only)
V
DD1
Supply Current I
DD1 (10)
2.8 3.5 mA 5 MHz logic signal freq.
V
DD2
Supply Current I
DD2 (10)
1.5 2.2 mA 5 MHz logic signal freq.
25 Mbps (URZ Grade Only)
V
DD1
Supply Current I
DD1 (25)
6.3 8.0 mA 12.5 MHz logic signal freq.
V
DD2
Supply Current I
DD2 (25)
3.4 4.8 mA 12.5 MHz logic signal freq.
For All Models
Input Currents I
IA
, I
IB
−10 +0.01 +10 µA 0 V ≤ V
IA
, V
IB
≤ (V
DD1
or V
DD2
)
Logic High Input Threshold V
IH
0.7 (V
DD1
or V
DD2
) V
Logic Low Input Threshold
V
IL
0.3 (V
DD1
or V
DD2
)
V
Logic High Output Voltages
V
OAH
, V
OBH
(V
DD1
or V
DD2
) − 0.1
V
DD1
or V
DD2
V
I
Ox
= −20 µA, V
Ix
= V
IxH
(V
DD1
or V
DD2
) − 0.5
(V
DD1
or V
DD2
) − 0.2
V
I
Ox
= −4 mA, V
Ix
= V
IxH
Logic Low Output Voltages V
OAL
, V
OBL
0.0 0.1 V I
Ox
= 20 µA, V
Ix
= V
IxL
0.04 0.1 V I
Ox
= 400 µA, V
Ix
= V
IxL
0.2 0.4 V I
Ox
= 4 mA, V
Ix
= V
IxL
SWITCHING SPECIFICATIONS
ADuM1200/ADuM1201WSRZ C
L
= 15 pF, CMOS signal levels
Minimum Pulse Width
2
PW 1000 ns
Maximum Data Rate
3
1 Mbps
Propagation Delay
4
t
PHL
, t
PLH
15
150
ns
Pulse Width Distortion, |t
PLH
− t
PHL
|
4
PWD 40 ns
Propagation Delay Skew
5
t
PSK
50 ns
Channel-to-Channel Matching
6
t
PSKCD/
t
PSKOD
50 ns
Output Rise/Fall Time (10% to 90%) t
R
/t
F
3 ns