Datasheet

ADuM1200/ADuM1201 Data Sheet
Rev. J | Page 24 of 28
APPLICATIONS INFORMATION
PCB LAYOUT
The ADuM1200/ADuM1201 digital isolators require no
external interface circuitry for the logic interfaces. Power supply
bypassing is strongly recommended at the input and output
supply pins.
The capacitor value should be between 0.01 μF and 0.1 μF.
The total lead length between both ends of the capacitor and
the input power supply pin should not exceed 20 mm.
See the AN-1109 Application Note for board layout guidelines.
PROPAGATION DELAY-RELATED PARAMETERS
Propagation delay is a parameter that describes the time it takes
a logic signal to propagate through a component. The propagation
delay to a logic low output can differ from the propagation delay
to a logic high output.
INPUT (
V
Ix
)
OUTPUT (V
Ox
)
t
PLH
t
PHL
50%
50%
04642-012
Figure 12. Propagation Delay Parameters
Pulse width distortion is the maximum difference between
these two propagation delay values and is an indication of
how accurately the timing of the input signal is preserved.
Channel-to-channel matching refers to the maximum amount
that the propagation delay differs between channels within a
single ADuM1200/ADuM1201 component.
Propagation delay skew refers to the maximum amount that
the propagation delay differs between multiple ADuM1200/
ADuM1201 components operating under the same conditions.
DC CORRECTNESS AND MAGNETIC FIELD IMMUNITY
Positive and negative logic transitions at the isolator input send
narrow (~1 ns) pulses to the decoder via the transformer. The
decoder is bistable and is therefore either set or reset by the pulses,
indicating input logic transitions. In the absence of logic
transitions of more than ~1 μs at the input, a periodic set of
refresh pulses indicative of the correct input state is sent to
ensure dc correctness at the output. If the decoder receives no
internal pulses for more than about 5 μs, the input side is
assumed to be unpowered or nonfunctional, in which case the
isolator output is forced to a default state (see Table 17 and
Table 18) by the watchdog timer circuit.
The ADuM1200/ADuM1201 are extremely immune to external
magnetic fields. The limitation on the magnetic field immunity
of the ADuM1200/ADuM1201 is set by the condition in which
induced voltage in the receiving coil of the transformer is
sufficiently large enough to either falsely set or reset the
decoder. The following analysis defines the conditions under
which this can occur. The 3 V operating condition of the
ADuM1200/ADuM1201 is examined because it represents the
most susceptible mode of operation.
The pulses at the transformer output have an amplitude greater
than 1.0 V. The decoder has a sensing threshold at about 0.5 V,
therefore establishing a 0.5 V margin in which induced voltages
can be tolerated. The voltage induced across the receiving coil is
given by
V = (−dβ/dt)Σ∏r
n
2
; n = 1, 2, … , N
where:
β is the magnetic flux density (gauss).
N is the number of turns in the receiving coil.
r
n
is the radius of the nth turn in the receiving coil (cm).
Given the geometry of the receiving coil in the ADuM1200/
ADuM1201 and an imposed requirement that the induced
voltage be 50% at most of the 0.5 V margin at the decoder, a
maximum allowable magnetic field is calculated, as shown in
Figure 13.
MAGNETIC FIELD FREQUENCY (Hz)
100
MAXIMUM ALLOWABLE MAGNETIC FLUX
DENSITY (kgauss)
0.001
1M
10
0.01
1k 10k 10M
0.1
1
100M100k
04642-013
Figure 13. Maximum Allowable External Magnetic Flux Density