Datasheet

Data Sheet ADuM1200/ADuM1201
Rev. J | Page 9 of 28
Parameter Symbol Min Typ Max Unit Test Conditions /Comments
25 Mbps (CR Grade Only)
V
DD1
Supply Current I
DD1 (25)
5 V/3 V Operation 6.3 8.0 mA 12.5 MHz logic signal freq.
3 V/5 V Operation 3.4 4.8 mA 12.5 MHz logic signal freq.
V
DD2
Supply Current I
DD2 (25)
5 V/3 V Operation 3.4 4.8 mA 12.5 MHz logic signal freq.
3 V/5 V Operation 6.3 8.0 mA 12.5 MHz logic signal freq.
For All Models
Input Currents I
IA
, I
IB
−10 +0.01 +10 μA 0 V ≤ V
IA
, V
IB
≤ (V
DD1
or V
DD2
)
Logic High Input Threshold V
IH
0.7 (V
DD1
or V
DD2
) V
Logic Low Input Threshold V
IL
0.3 (V
DD1
or V
DD2
) V
Logic High Output Voltages V
OAH
, V
OBH
(V
DD1
or V
DD2
) − 0.1 V
DD1
or V
DD2
V I
Ox
= −20 μA, V
Ix
= V
IxH
(V
DD1
or V
DD2
) − 0.5 (V
DD1
or V
DD2
) − 0.2 V I
Ox
= −4 mA, V
Ix
= V
IxH
Logic Low Output Voltages V
OAL
, V
OBL
0.0 0.1 V I
Ox
= 20 μA, V
Ix
= V
IxL
0.04 0.1 V I
Ox
= 400 μA, V
Ix
= V
IxL
0.2 0.4 V I
Ox
= 4 mA, V
Ix
= V
IxL
SWITCHING SPECIFICATIONS
ADuM1200/ADuM1201AR C
L
= 15 pF, CMOS signal levels
Minimum Pulse Width
2
PW 1000 ns
Maximum Data Rate
3
1 Mbps
Propagation Delay
4
t
PHL
, t
PLH
50 150 ns
Pulse Width Distortion, |t
PLH
− t
PHL
|
4
PWD 40 ns
Change vs. Temperature 11 ps/°C
Propagation Delay Skew
5
t
PSK
50 ns
Channel-to-Channel Matching
6
t
PSKCD
/t
PSKOD
50 ns
Output Rise/Fall Time (10% to 90%) t
R
/t
F
10 ns
ADuM1200/ADuM1201BR C
L
= 15 pF, CMOS signal levels
Minimum Pulse Width
2
PW 100 ns
Maximum Data Rate
3
10 Mbps
Propagation Delay
4
t
PHL
, t
PLH
15 55 ns
Pulse Width Distortion, |t
PLH
− t
PHL
|
4
PWD 3 ns
Change vs. Temperature 5 ps/°C
Propagation Delay Skew
5
t
PSK
22 ns
Channel-to-Channel Matching
Codirectional Channels
6
t
PSKCD
3 ns
Opposing Directional Channels
6
t
PSKOD
22 ns
Output Rise/Fall Time (10% to 90%) t
R
/t
F
5 V/3 V Operation 3.0 ns
3 V/5 V Operation 2.5 ns
ADuM1200/ADuM1201CR C
L
= 15 pF, CMOS signal levels
Minimum Pulse Width
2
PW 20 40 ns
Maximum Data Rate
3
25 50 Mbps
Propagation Delay
4
t
PHL
, t
PLH
20 50 ns
Pulse Width Distortion, |t
PLH
− t
PHL
|
4
PWD 3 ns
Change vs. Temperature 5 ps/°C
Propagation Delay Skew
5
t
PSK
15 ns
Channel-to-Channel Matching
Codirectional Channels
6
t
PSKCD
3 ns
Opposing Directional Channels
6
t
PSKOD
15 ns
Output Rise/Fall Time (10% to 90%) t
R
/t
F
5 V/3 V Operation 3.0 ns
3 V/5 V Operation 2.5 ns