Datasheet

Data Sheet ADuM1440/ADuM1441/ADuM1442/ADuM1445/ADuM1446/ADuM1447
Rev. E | Page 15 of 25
V
DD1
1
GND
1
1
2
V
IA
3
V
IB
4
V
DD2
16
GND
2
2
15
V
OA
14
V
OB
13
V
IC
5
V
OC
12
V
OD
6
V
ID
11
EN
1
7
EN
2
10
GND
1
1
8
GND
2
2
9
ADuM1441/
ADuM1446
TOP VIEW
(Not to Scale)
1
PIN 2 AND PIN 8 ARE INTERNALLY CONNECTED. CONNECTING BOTH
TO GND
1
IS RECOMMENDED.
2
PIN 9 AND PIN 15 ARE INTERNALLY CONNECTED. CONNECTING
BOTH TO GND
2
IS RECOMMENDED.
1
1845-005
Figure 7. ADuM1441/ADuM1446 QSOP Pin Configuration
V
DD1
1
GND
1
1
2
V
IA
3
V
IB
4
V
DD2
NIC = NOT INTERNALLY CONNECTED.
20
GND
2
2
19
V
OA
18
V
OB
17
V
IC
5
V
OC
16
V
OD
6
V
ID
15
EN
1
7
EN
2
14
NIC
8
NIC
13
NIC
9
NIC
12
GND
1
1
10
GND
2
2
11
ADuM1441/
ADuM1446
TOP VIEW
(Not to Scale)
1
PIN 2 AND PIN 10 ARE INTERNALLY CONNECTED.
CONNECTING BOTH TO GND
1
IS RECOMMENDED.
2
PIN 11 AND PIN 19 ARE INTERNALLY CONNECTED.
CONNECTING BOTH TO GND
2
IS RECOMMENDED.
11845-108
Figure 8. ADuM1441/ADuM1446 SSOP Pin Configuration
Table 23. ADuM1441/ADuM1446 Pin Function Descriptions
1
QSOP
Pin No.
2
SSOP
Pin No. Mnemonic Description
1 1 V
DD1
Supply Voltage for Isolator Side 1 (2.25 V to 3.6 V). Connect a ceramic bypass capacitor in the 0.01
µF to 0.1 µF range between V
DD1
(Pin 1) and GND
1
(Pin 2).
2, 8 2, 10 GND
1
Ground 1. Ground reference for Isolator Side 1. Pin 2 and Pin 8 are internally connected, and connecting
both to GND
1
is recommended.
3 3 V
IA
Logic Input A.
4 4 V
IB
Logic Input B.
5 5 V
IC
Logic Input C.
6 3 V
OD
Logic Output D.
7 7 EN
1
Refresh/Watchdog Enable 1. Connecting Pin 7 to GND
1
enables input/output refresh and
watchdog functionality for Side 1, supporting standard iCoupler operation. Tying Pin 7 to V
DD1
disables refresh and watchdog functionality for lowest power operation, see the Applications
Information section for a detailed description of this mode. EN
1
and EN
2
must be set to the same
logic state.
9, 15 11, 19 GND
2
Ground 2. Ground reference for Isolator Side 2. Pin 9 and Pin 15 are internally connected, and
connecting both to GND
2
is recommended.
10 14 EN
2
Refresh/Watchdog Enable 2. Connecting Pin 10 to GND
2
enables input/output refresh and
watchdog functionality for Side 2, supporting standard iCoupler operation. Tying Pin 10 to V
DD2
disables refresh and watchdog functionality for lowest power operation, see the Applications
Information section for a detailed description of this mode. EN
1
and EN
2
must be set to the same
logic state.
11 15 V
ID
Logic Input D.
12 16 V
OC
Logic Output C.
13 17 V
OB
Logic Output B.
14 18 V
OA
Logic Output A.
16 20 V
DD2
Supply Voltage for Isolator Side 2 (2.25 V to 3.6 V). Connect a ceramic bypass capacitor in the 0.01
µF to 0.1 µF range between V
DD2
(Pin 16) and GND
2
(Pin 15).
N/A 8, 9, 12, 13 NC No Connect. Do not connect to this pin.
1
Reference the AN-1109 Application Note for specific layout guidelines.
2
N/A = not applicable.