Datasheet

ADV212
Rev. B | Page 11 of 44
RDFB
DACK
DREQ
0 1 2
t
RD
t
HD
t
DREQ
DREQ
PULSE
t
RD
SU
t
RD
HD
DACK
HIGH
DACK
LOW
HDATA
06389-020
Figure 11. Single Read Cycle for Fly-By DMA Mode
(
DREQ
Pulse Width Is Programmable)
RD
FSRQ0
FCS0
HDATA
0
1
RDFSRQ
FIFO NOT EMPTY
FIFO EMPTY
t
HD
t
RD
06389-090
Figure 12. Single Read Access for DCS DMA Mode