Datasheet

ADV212
Rev. B | Page 29 of 44
INDIRECT REGISTERS
In certain modes, such as custom-specific input format or HIPI
mode, indirect registers must be accessed by the user through
the IADDR and IDATA registers. The indirect register address
space starts at Internal Address 0xFFFF0000.
Both 32-bit and 16-bit hosts can access the indirect registers:
32-bit hosts use the IADDR and IDATA registers, and 16-bit
hosts use the IADDR, IDATA, and stage registers.
Table 19. Indirect Registers
Address Name Description
0xFFFF0400 PMODE1 Pixel/video format
0xFFFF0404 COMP_CNT_STATUS Horizontal count
0xFFFF0408 LINE_CNT_STATUS Vertical count
0xFFFF040C XTOT Total samples per line
0xFFFF0410 YTOT Total lines per frame
0xFFFF0414 F0_START Start line of Field 0 [F0]
0xFFFF0418 F1_START Start line of Field 1 [F1]
0xFFFF041C V0_START Start of active video Field 0 [F0]
0xFFFF0420 V1_START Start of active video Field 1 [F1]
0xFFFF0424 V0_END End of active video Field 0 [F0]
0xFFFF0428 V1_END End of active video Field 1 [F1]
0xFFFF042C PIXEL_START Horizontal start of active video
0xFFFF0430 PIXEL_END Horizontal end of active video
0xFFFF0440 MS_CNT_DEL Master/slave delay
0xFFFF0444 Reserved Reserved
0xFFFF0448 PMODE2 Pixel Mode 2
0xFFFF044C VMODE Video mode
0xFFFF1408 EDMOD0 External DMA Mode Register 0
0xFFFF140C EDMOD1 External DMA Mode Register 1
0xFFFF1410 FFTHRP FIFO threshold for pixel FIFO
0xFFFF1414 Reserved Reserved
0xFFFF1418 Reserved Reserved
0xFFFF141C FFTHRC FIFO threshold for code FIFO
0xFFFF1420 FFTHRA FIFO threshold for ATTR FIFO
0xFFFF1424 to 0xFFFF14FC Reserved Reserved