Datasheet

ADV212
Rev. B | Page 31 of 44
HARDWARE BOOT MODES AND POWER
CONSIDERATIONS
The boot mode can be configured via hardware using the CFG
pins or via software. The first boot mode after power-up is set
by the CFG pins and should always be as described in the pin
listing. CFG1 is tied to IOVDD through a 10 k resistor and
CFG2 is tied to GND through a 10 k resistor.
There is no special power sequencing requirement for VDD and
IOVDD.
It is strongly recommended that the user place a small decoup-
ling cap close to every power pin and at least one bulk cap on
each supply.