Datasheet

ADV212
Rev. B | Page 38 of 44
32-BIT HOST APPLICATION
Figure 37 shows two ADV212 chips using a 10-bit CCIR 656 in normal host mode.
ENCODE MODE
32-BIT
HOST CPU
ADV212
DATA[31:0]
IRQIRQ
ADDR[3:0]
ADDR[3:0]
CSCS
RDRD
WEWE
ACK
ACK
FPGA
ADV7189
10-BIT
VIDEO
DECODER
P[19:10]
LLC1
V
DATA[11:2]
VIDEO IN
VCLK
MCLK
DREQ0DREQ0
DACK0DACK0
HDATA[31:0]DATA[31:0]
27MHz
OSC
27MHz
OSC
DECODE MODE
31-BIT
HOST CPU
ADV212
DATA[31:0]
IRQIRQ
ADDR[3:0]ADDR[3:0]
CSCS
RDRD
WEWE
ACKACK
FPGA
10-BIT
VIDEO
ENCODER
P[9:0]VDATA[11:2]
VIDEO OUT
CLKINVCLK
MCLK
DREQ0DREQ0
DACK0DACK0
HDATA[31:0]DATA[31:0]
06389-006
Figure 37. Encode/Decode 32-Bit Host Application