Datasheet

ADV3226/ADV3227
Rev. 0 | Page 20 of 24
CIRCUIT DIAGRAMS
INx
2.1pF
7
DGND
1kΩ
A[3:0], CE, CLK,
D[4:0], DATAIN,
SER/PAR, UPDATE
08653-00
08653-008
Figure 58. Analog Input
OUTx
08653-010
Figure 59. Analog Output Enabled
AVCC
INx, OUTx
AGND
DVCC
DGND
AGND
CLK, RESET,
SER/PAR, CE,
UPDATE,
DATAIN,
DATAOUT,
A[3:0]. D[4:0]
08653-013
Figure 60. ESD Map
Figure 61. Logic Input
OUTx
2.7pF
08653-011
Figure 62. Analog Output Disabled
DVCC
1kΩ
20kΩ
RESET
8653-009 DGND
0
Figure 63. Reset Input
DVCC
DGND
DATAOUT
08653-012
Figure 64. Logic Output