Datasheet

ADV7390/ADV7391/ADV7392/ADV7393 Data Sheet
Rev. G | Page 72 of 108
TYPICAL APPLICATIONS CIRCUITS
Figure 93. ADV739x (LFCSP) Typical Applications Circuit
P0
P1
P2
P3
P4
P5
P6
P7
P8
P9
P10
P11
P12
P13
P14
P15
DGNDPGND
DGNDPGND
0.1µF
GND_IO
0.01µF
GND_IO
33µF
GND_IO
10µF
GND_IO
FERRITE BEAD
V
DD_IO
V
DD_IO
POWER
SUPPLY
DECOUPLING
0.1µF
PGND
0.01µF
PGND
33µF
PGND
10µF
PGND
FERRITE BEAD
PV
DD
PV
DD
POWER
SUPPLY
DECOUPLING
0.1µF
AGND
0.01µF
AGND
33µF
AGND
10µF
AGND
FERRITE BEAD
V
AA
V
AA
POWER
SUPPLY
DECOUPLING
0.1µF
DGND
0.01µF
DGND
33µF 10µF
DGND
FERRITE BEAD
V
DD
V
DD
POWER SUPPLY
DECOUPLING FOR
EACHPOWER PIN
V
DD_IO
PV
DD
V
AA
V
DD
ADV739x
HSYNC
VSYNC
CLKIN
AGND
AGND
DGND
DGND
GND_IO
GND_IO
R
SET
AGND
510Ω
DAC 1
DAC 2
DAC 3
AGND
75Ω
AGND
75Ω
AGND
75Ω
DAC 1
DAC 2
DAC 3
COMP
V
AA
2.2nF
EXT_LF
12nF
150nF
170Ω
PV
DD
SDA
SCL
ALSB
RESET
PIXEL
PORT INPUTS
CONTROL
INPUTS/OUTPUTS
CLOCK INPUT
I2C PORT
DAC 1
DAC 1
DAC 3
DGND
V
DD
DAC1 TO DAC3 LOW DRIVE OPTION
R
SET
AGND
4.12kΩ
EXTERNAL LOOP FILTER
LOOP FILTER COMPONENTS
SHOULD BE LOCATED
CLOSE TO THE EXT_LF
PIN AND ON THE
SAME SIDE OF THE PCB
AS THE ADV739x.
NOTES
1. FOR OPTIMUM PERFORMANCE, EXTERNAL COMPONENTS CONNECTED
TO THE COMP, R
SET
AND DAC OUTPUT PINS SHOULD BE LOCATED
CLOSE TO, AND ON THE SAME SIDE OF THE PCB AS, THE ADV739x.
2. THE I
2
C DEVICE ADDRESS IS CONFIGURABLE USING THE ALSB PIN:
ALSB = 0, I
2
C DEVICE ADDRESS = 0xD4 (ADV7390/ADV7392) OR
0x54 (ADV7391/ADV7393)
ALSB = 1, I
2
C DEVICE ADDRESS = 0xD6 (ADV7390/ADV7392) OR
0x56 (ADV7391/ADV7393)
3. THE RESISTOR CONNECTED TO THE R
SET
PIN SHOULD HAVE A 1%
TOLERANCE.
4. THE RECOMMENDED MODE OF OPERATION FOR THE DACs IS FULL-
DRIVE (R
SET
= 510Ω, R
L
= 37.5Ω).
DAC1 TO DAC3 FULL DRIVE OPTION
(RECOMMENDED)
75Ω
AGND
300Ω
ADA4411-3
DAC 2
1µF
AGND
OPTIONAL LPF
OPTIONAL LPF
OPTIONAL LPF
ADV7392/
ADV7393
ONLY
LPF
DAC 2
75Ω
AGND
300Ω
ADA4411-3
LPF
DAC 3
75Ω
AGND
300Ω
ADA4411-3
LPF
06234-092
TIE EITHER LOW
OR HIGH