Datasheet

Data Sheet ADV7390/ADV7391/ADV7392/ADV7393
Rev. G | Page 81 of 108
Figure 106. SD Timing Mode 0, Master Option, PAL
Figure 107. SD Timing Mode 0, Master Option, Data Transitions
Mode 1—Slave Option (Subaddress 0x8A = X X X X X 0 1 0)
In this mode, the ADV739x accepts horizontal synchronization and odd/even field signals. When
HSYNC
is low, a transition of the field
input indicates a new frame, that is, vertical retrace.
HSYNC
and FIELD are input on the
HSYNC
and
VSYNC
pins, respectively.
Figure 108. SD Timing Mode 1, Slave Option, NTSC
622 623 624 625
21
22 23
DISPLAY
DISPLAY
VERTICAL BLANK
H
F
ODD FIELD
EVEN FIELD
309 310 311 312 314 315 316 317
318
319 320
334
335 336
DISPLAY
DISPLAY
VERTICAL BLANK
H
F
ODD FIELD
EVEN FIELD
313
765
4
32
1
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ANALOG
VIDEO
H
F
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260 261 262 263 264 265 266 267 268 269 270 271 272 273 274
283
284
285
ODD FIELD EVEN FIELD
DISPLAY
DISPLAY
VERTICAL BLANK
522 523 524 525
5 9
10 11
20 21 22
DISPLAY
DISPLAY
VERTICAL BLANK
ODD FIELD
EVEN FIELD
FIELD
FIELD
HSYNC
HSYNC
7
6
4
3
2
1
8
06234-106