Datasheet

Watch Dog Timer Interface
1-12 ADSP-21479 EZ-Board Evaluation System Manual
The SPI flash memory, a 16 Mb ST M25P16 device, connects to the SPI
port of the processor and designates:
• DPI pin 5 (
DPI_P5) as a chip select
• DPI pin 3 (DPI_P3) as the SPI clock
• DPI pin 1 (DPI_P1) as the master out slave in (MOSI) pin
• DPI pin 2 (DPI_P2) as the master in slave out (MISO) pin
The same SPI port and DPI pins are connected to the serial flash memory
and audio codec via switch SW3. See “DPI [1–8] Enable Switch (SW3)” on
page 2-9. The DPI pins also are available on the expansion interface II.
By default, the EZ-Board boots from the 8-bit flash parallel memory. SPI
flash can be selected as the boot source by setting the boot mode select
switch (SW4) to position 1. See “Boot Mode Select Switch (SW4)” on
page 2-10.
The audio codec is set up to use DPI pin 4 as the SPI chip select. For more
information, refer to “Audio Interface” on page 1-15.
Watch Dog Timer Interface
The ADSP-21479 processor includes a 32-bit watch dog timer (WDT)
that can be used to implement a software watch dog function. A software
watch dog can improve system reliability by forcing the processor to a
known state through generation of a system reset if the timer expires
before being reloaded by software. Software initializes the count value of
the timer and then enables the timer.
The watch dog timer resets both the core and internal peripherals. After
an external reset, the WDT must be disabled by default. Software must be
able to determine if the watch dog has been the source of the hardware
reset by interrogating a status bit in the watch dog timer control register.