User manual

P
R
E
L
I
M
I
N
A
R
Y
T
E
C
H
N
I
C
A
L
D
A
T
A
P
R
E
L
I
M
I
N
A
R
Y
T
E
C
H
N
I
C
A
L
D
A
T
A
For current information contact Analog Devices at [phone]
ADSP-2192 October 2000
This information applies to a product under development. Its characteristics and specifications are subject to change with-
out notice. Analog Devices assumes no obligation regarding future manufacturing unless otherwise agreed to in writing.
44 REV. PrA
Table 37. Sub-ISA Interface Timing Parameters
Parameters Description Min. Typ Max Units
t
STW
IOR / IOW Strobe Width 100 ns
t
ICYC
IOR / IOW Cycle Time 240 ns
t
AESU
AEN Setup to IOR / IOW Falling 10 ns
t
AEHD
AEN Hold from IOR / IOW Rising 0 ns
t
ADSU
Address Setup to IOR / IOW Falling 10 ns
t
ADHD
Address Hold from IOR / IOW Rising 0 ns
t
DHD1
Data Hold from IOR Rising 20 ns
t
DHD2
Data Hold from IOW Rising 15 ns
t
RDDV
IOR Falling to Valid Read Data 40 ns
t
WDSU
Write Data Setup to IOW Rising 10 ns
t
RDY1
IOR / IOW Rising from IOCHRDY Rising 0 ns
t
RDY2
IOCHRDY Falling from IOR / IOW Rising 20 ns
Figure 12. Sub-ISA Interface Read Cycle Timing Diagram
t
AESU
IOCHRDY
ISAD15-0
IOR
AEN
ISAA3-1
t
RDY1
t
RDY2
t
AEHD
t
ICYC
t
RRDV
t
DHD1
t
STW
t
ADSU
t
ADHD