Datasheet

REF01/REF02/REF03 Data Sheet
Rev. M | Page 14 of 20
THEORY OF OPERATION
REF01, REF02, and REF03 are high precision, low drift 10.0 V,
5.0 V, and 2.5 V voltage references available in a variety of
packages. These devices are standard band gap references (see
Figure 33). The band gap cell contains two NPN transistors
(Q18 and Q19) that differ in emitter area by a factor of 2. The
difference in the V
BE
values of these transistors produces a
proportional-to-absolute temperature current (PTAT) through
R14, and, when combined with the V
BE
of Q19, produces a band
gap voltage, V
BG
, that is almost constant over temperature.
With an internal op amp and the feedback network created by
R5 and R6, V
O
is set precisely at 10.0 V, 5.0 V, or 2.5 V. Precision
laser trimming of various resistors and other proprietary circuit
techniques are used to further enhance the initial accuracy,
temperature curvature, and drift performance of the device.
The PTAT voltage is brought out directly from the band gap,
unbuffered, at the TEMP pin. Since this voltage output has a
stable 1.96 mV/°C temperature coefficient, users can estimate
the temperature change of the device by simply monitoring the
change in voltage at this pin.
R1
R2
R3
R4
V
IN
Q23
Q1
Q2
Q7
Q8
Q9
Q3
Q10
D1
D2
Q4
V
O
D3
C1
R13
Q12
Q13
R5
I1
R12
Q14
Q15
2×
1×
V
BG
R20
TRIM
Q18
TEM
P
R27
Q19
Q16
Q17
Q20
R6
R42
R41
R24
R32
R11
R17
R14
GND
00375-033
Figure 33. REF01/REF02/REF03 Simplified Schematic
INPUT AND OUTPUT CAPACITORS
Figure 34 shows the basic input/output capacitor configuration
for the REF01/REF02/REF03 series of references.
U1
REF01/
REF02/
REF03
V
O
C2
0.1µF
C1
0.1µF
V
IN
V
IN
V
OUT
TEMP
TRIM
GND
00375-034
Figure 34. Basic REF01/REF02/REF03 Capacitor Configuration
While the REF01/REF02/REF03 series of references are
designed to function stably without any external components,
connecting a 0.1 μF ceramic capacitor to the output is highly
recommended to improve stability and filter out low level
voltage noise. An additional 1 μF to 10 μF electrolytic, tantalum,
or ceramic capacitor can be added in parallel to improve
transient performance in response to sudden changes in load
current; however, the designer should keep in mind that doing
so increases the turn-on time of the device.
A 1 μF to 10 μF electrolytic, tantalum, or ceramic capacitor
can also be connected to the input to improve transient
response in applications where the supply voltage may fluctuate.
An additional 0.1 μF ceramic capacitor should be connected in
parallel to reduce supply noise.
Both input and output capacitors should be mounted as close to
the device pins as possible.
OUTPUT ADJUSTMENT
The REF01/REF02/REF03 trim terminal can be used to adjust
the output up or down from the internally trimmed, nominal
output voltage. This feature allows the system designer to trim
out system errors due to changes in line and load conditions,
thermal hysteresis, output offset due to solder reflow, or other
error sources. The basic trim circuit configuration is shown
in Figure 35.
Table 7 also lists the range of output voltages obtainable from
each model in this configuration.
U1
REF01/
REF02/
REF03
V
IN
V
OUT
TEM
P
TRIM
GND
V
IN
V
O
POT
10kΩ
R2
1kΩ
R1
470kΩ
00375-035
Figure 35. Optional Trim Adjustment Circuit
Table 7. Adjustment Range Using Trim Circuit
Model V
OUT
, Low Limit V
OUT
, High Limit
REF01 9.70 V 10.05 V
REF02 4.95 V 5.02 V
REF03
2.3 V
2.8 V
Adjustment of the output does not significantly affect the
temperature performance of the reference itself, provided the
temperature coefficients of the resistors used are low.