SHARC® EZ-Extender® Manual Revision 3.0, April 2006 Part Number 82-000805-01 Analog Devices, Inc. One Technology Way Norwood, Mass.
Copyright Information ©2006 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express written consent from Analog Devices, Inc. Printed in the USA. Limited Warranty The SHARC EZ-Extender is warranted against defects in materials and workmanship for a period of one year from the date of purchase from Analog Devices or from an authorized dealer. Disclaimer Analog Devices, Inc. reserves the right to change this product without prior notice.
Regulatory Compliance The SHARC EZ-Extender has been certified to comply with the essential requirements of the European EMC directive 89/336/EEC (inclusive 93/68/EEC) and, therefore, carries the “CE” mark. The SHARC EZ-Extender has been appended to Analog Devices Development Tools Technical Construction File referenced “DSPTOOLS1” dated December 21, 1997 and was awarded CE Certification by an appointed European Competent Body and is on file.
iv SHARC EZ-Extender Manual
CONTENTS PREFACE Purpose of This Manual ................................................................ viii Intended Audience .......................................................................... ix Manual Contents ............................................................................ ix What’s New in This Manual ............................................................. x Technical or Customer Support ........................................................ x Supported Products ...........
CONTENTS DIP Switches and Jumpers ............................................................ 2-3 Direction/Clock Source Control Switch (SW1) ........................ 2-3 MISO Disconnect Jumper (P6) ............................................... 2-5 SMA Connector Clock Disconnect Jumper (P10) .................... 2-5 EZ-EXTENDER BILL OF MATERIALS EZ-EXTENDER SCHEMATIC Title Page ..................................................................................... B-1 Expansion Connector P1 .............
PREFACE Thank you for purchasing the SHARC® EZ-Extender®, Analog Devices (ADI) extension board to the EZ-KIT Lite® evaluation system for ADSP-21262 SHARC processors. The SHARC processors are based on a 32-bit super Harvard architecture that includes a unique memory architecture comprised of two large on-chip, dual-ported SRAM blocks coupled with a sophisticated IO processor, which gives SHARC the bandwidth for sustained high-speed computations.
Purpose of This Manual The board extends the capabilities of the evaluation system by providing a connection between the parallel data access port (PDAP) of the ADSP-21262 processor and an Analog Devices analog-to-digital high-speed converter (ADC HSC) evaluation board. Moreover, the extender broadens the range of the EZ-KIT Lite applications by providing surface-mounted (SMT) footprints for breadboard capabilities and access to all of the pins on the EZ-KIT Lite’s expansion interface.
Preface Intended Audience This manual is a user’s guide and reference to the SHARC EZ-Extender. Programmers who are familiar with the Analog Devices SHARC processor architecture, operation, and development tools are the primary audience for this manual. Programmers who are unfamiliar with VisualDSP++ or EZ-KIT Lite evaluation software should refer to the ADSP-21262 EZ-KIT Lite Evaluation System Manual, VisualDSP++ online Help, and user’s or getting started guides.
What’s New in This Manual • Appendix B,“EZ-Extender Schematic” on page B-1 Provides the resources to allow modifications to the EZ-Extender or to use as a reference design. B now is part of the online Help. The PDF version of L Appendix the SHARC EZ-Extender Manual is located in the Docs\EZ-KIT Lite Manuals folder on the installation CD. Alternatively, the book can be found at the Analog Devices Web site, www.analog.com/processors.
Preface • Contact your Analog Devices, Inc. local sales office or authorized distributor • Send questions by mail to: Analog Devices, Inc. One Technology Way P.O. Box 9106 Norwood, MA 02062-9106 USA Supported Products The SHARC EZ-Extender is designed as an extension to the ADSP-21262 EZ-KIT Lite evaluation system. Product Information You can obtain product information from the Analog Devices Web site, from the product CD-ROM, or from the printed publications (manuals). Analog Devices is online at www.
Product Information Registration: Visit www.myanalog.com to sign up. Click Register to use MyAnalog.com. Registration takes about five minutes and serves as means for you to select the information you want to receive. If you are already a registered user, just log on. Your user name is your e-mail address. Processor Product Information For information on embedded processors and DSPs, visit our Web site at www.analog.
Preface Table 1. Related Processor Publications Title Description ADSP-21262 SHARC Microprocessor Datasheet General functional description, pinout, and timing ADSP-2126x SHARC DSP Core Manual ADSP-2126x SHARC DSP Peripherals Manual Description of internal processor architecture, registers, and all peripheral functions ADSP-21160 SHARC DSP Instruction Set Reference Description of all allowed processor assembly instructions Table 2.
Product Information Online Technical Documentation Online documentation comprises the VisualDSP++ Help system, software tools manuals, hardware tools manuals, processor manuals, the Dinkum Abridged C++ library, and Flexible License Manager (FlexLM) network license manager software documentation. You can easily search across the entire VisualDSP++ documentation set for any topic of interest. For easy printing, supplementary .
Preface Notation Conventions Text conventions used in this manual are identified and described as follows. Example Description {this | that} Alternative required items in syntax descriptions appear within curly brackets and separated by vertical bars; read the example as this or that. One or the other is required. [this | that] Optional items in syntax descriptions appear within brackets and separated by vertical bars; read the example as an optional this or that.
Notation Conventions xvi SHARC EZ-Extender Manual
1 EZ-EXTENDER INTERFACES This chapter relates how the extender interfaces with the compatible boards. The information is presented in the following sections. • “ADC HSC Interface” on page 1-1 • “Breadboard Area” on page 1-2 ADC HSC Interface The SHARC EZ-Extender can connect to an analog-to-digital high-speed converter (ADC HSC) evaluation board via the ADC HSC interface.
Breadboard Area Switch (SW1)” on page 2-3. The setup of the general-purpose signals DAI_P15_GP1 and DAI_P16_GP2 is dependent on the specific ADC HSC evaluation board being interfaced; therefore, the board’s model must be taken into consideration. The data bus of the EZ-Extender must be enabled before data is read. Enable the data bus by a memory read from address 0x160 0000, which the AD[15:0] pins set up as the external port. Then, the AD[15:0] pins can be set up in PDAP mode.
2 EZ-EXTENDER HARDWARE REFERENCE This chapter describes the hardware design of the SHARC EZ-Extender. The following topics are covered. • “System Architecture” on page 2-1 Describes the configuration of the extender and explains how the board components interface with the processor and EZ-KIT Lite. • “DIP Switches and Jumpers” on page 2-3 Describes the function of the configuration DIP switches and jumpers. System Architecture A detailed block diagram of the SHARC EZ-Extenderis shown in Figure 2-1.
System Architecture Figure 2-1. SHARC EZ-Extender Block Diagram The block diagram in Figure 2-1 shows that each clock and general-purpose signal attached to the analog-to-digital high-speed converter (ADC HSC) interface is configured depending on how the interface operates. The EZ-Extender has two clock signals, TX_CLK and RX_CLK.
EZ-Extender Hardware Reference ing a socket with an oscillator. Only one of these sources can be used at a time, the other sources must be disabled. For more information on how to disable the TX_CLK sources, see “SMA Connector Clock Disconnect Jumper (P10)” on page 2-5. The RX_CLK signal is generated by the target board. Both the TX_CLK and RX_CLK can connect to the processor’s clock-in signal (DAI_P2_CLOCKIN) as an input. See “Direction/Clock Source Control Switch (SW1)” on page 2-3 for more information.
DIP Switches and Jumpers When the SW1 switch connects a direction control signal to ground (GND), the corresponding signal (signals) is (are) controlled as input. The direction control functionality is summarized in Table 2-1. Table 2-1.
EZ-Extender Hardware Reference MISO Disconnect Jumper (P6) The MISO signal of the serial peripheral interconnect (SPI) connector (J2) is driven by a buffer to the processor’s MISO signal, as illustrated in Figure 2-1 on page 2-2. When the SPI connector is not in use, remove the P6 jumper to prevent the signal from interfering with other devices on the SPI bus. SMA Connector Clock Disconnect Jumper (P10) The SMA connector (J3) enables a clock input from a signal generator or from other clock source.
DIP Switches and Jumpers 2-6 SHARC EZ-Extender Manual
A EZ-EXTENDER BILL OF MATERIALS The bill of materials corresponds to “EZ-Extender Schematic” on page B-1. Please check the latest schematic on the Analog Devices Web site: http://www.analog.com/Processors/Processors/DevelopmentTools/tec hnicalLibrary/manuals/DevToolsIndex.html#Evaluation%20Kit%20Manuals. Ref. Qty.
A-2 Ref. Qty. Description Reference Designator Manufacturer Part Number 10 1 RJ45 8PIN CON_RJ45 J2 TYCO 1-16609214-1 11 1 SMA XPINS CON043 J3 JOHNSON COMP 142-0701-201 12 2 IDC 2X1 IDC2X1 P6,P10 FCI 90726-402HLF 13 2 IDC 2PIN_JUMPER_ SHORT SJ1-2 DIGI-KEY S9001-ND 14 1 51 1/8W 5% 1206 R9 VISHAY CRCW120651R0JKEA 15 14 0.
A B C D 1 1 2 2 ADSP-21262 EZ-Extender 1 3 3 ANALOG DEVICES 4 Title Size A B C Nashua, NH 03063 4 PH: 1-800-ANALOGD ADSP21262 EX-EXTENDER 1 TITLE Board No. C Date 20 Cotton Road Rev A0182-2003 2.
A B C D EXPANSION INTERFACE (TYPE A) 5V 5V 5V 1 1 P1_[21:86] P1_[21:86] AD[0:15] P1_[21:86] AD[0:15] AD[0:15] P1A 2 P1 1 2 1 2 AD0 3 4 AD2 3 4 AD4 5 6 AD6 AD0 5 6 AD1 P1B 1 2 AD1 3 4 AD3 AD5 5 6 AD7 AD8 7 8 AD10 AD2 7 8 AD3 AD9 7 8 AD11 AD12 9 10 AD14 AD4 9 10 AD5 AD13 9 10 AD15 P1_21 11 12 P1_23 AD6 11 12 AD7 P1_22 11 12 P1_24 P1_25 13 14 P1_27 AD8 13 14 AD9 P1_26 13 14 P1_28 P1_29 15 16 P1_31 AD10 15 16 AD
A B C D EXPANSION INTERFACE (TYPE A) 3.3V 1 1 3.3V 3.
A B C D EXPANSION INTERFACE (TYPE A) 3.3V 3.3V 1 3.
A B C D 3.
A B C D 3.3V Label pin 1 = TXCLK Label pin 2 = GND Place close to each other R18 33 0805 U7 1 OE/NC OUT 1 To be used as test point P4 2 5 CLOCK SHIFT CIRCUITRY 1 Place close to each other IDC2X1 DNP DIP8SOC U4 R14 0 0805 DNP 1 R16 10K 0805 1 2 4 Direction/Clock Source Control J3 SMA CON043 2 4 1 2 12 U5 2 11 2 3 10 DIR_GP1 4 9 5 8 6 7 4 SN74LVC1G14DBVR SOT23-5 3 IDC2X1 2 SW1 1 2 1 RX_CLK P10 6 SJ1 3.
A B C D 1 1 TP99 P17 1 2 TP108 P20 TP80 1 0805 2 TP5 2 TP21 1 2 2 TP43 TP103 1 TP110 2 TP69 2 1 0805 2 0805 P28 1 TP115 2 TP109 P29 1 TP118 TP102 TP112 P26 1 TP105 TP114 2 TP116 2 TP117 TP111 P30 1 TP120 2 TP113 P31 1 TP121 0805 P9 TP89 2 TP119 TP91 TP90 0805 P27 1 2 0805 0805 P23 TP104 TP107 0805 P25 1 0805 P19 1 2 0805 P22 0805 TP53 TP100 0805 P18 1 P24 1 0805 P21 TP101 0805 TP32 TP106 0805 P16 1 TP94 2 1 2 3 4 5 6
I INDEX A D ADC (analog-to-digital converter) interface, 1-1, 2-2 address bus, 2-3 ADSP-21262 processors clock in signal (DAI_PP2_CLOCKIN), 2-3, 2-4 MIS0 signal, 2-5 ADx pins, 1-2 architecture, of this EZ-Extender, 2-1 DAI_Px signals, 1-1, 2-3 data bus, 1-2, 2-3 transfer (PDAP/HSC), 1-1 dimensions, of this EZ-Extender, -viii DIP switch (SW1), 2-3 direction control switch (SW1), 2-3 B bidirectional drivers, 2-1 bill of materials, A-1 block diagram, of this EZ-Extender, 2-1 board schematic, B-1 breadboa
INDEX J R jumpers, 2-3 clock disconnect (P10), 2-5 MISO disconnect (P6), 2-5 RJ-45 connector, -viii, 1-1 RX_CLK signal, 2-2, 2-4 S M oscillator, 2-3 schematic, of this EZ-Extender, B-1 serial peripheral interconnect (SPI) connector (J2), 2-5 signals, -viii, 1-1 signal generator, 2-5 SMA connector (J3), 2-2, 2-5 surface-mounted (SMT) footprints, -viii, 1-2 SW1 (direction/clock source control) switch, 2-3 P T P10 (SMA connector clock disconnect) jumper, 2-5 P6 (MISO disconnect) jumper, 2-5 parallel
