Specifications

AWARD BIOS
3-13
Chipset Features à 8 Bit I/O Recovery Time
8 Bit I/O Recovery
Time
1
2
3
4
5
6
7
8
NA
For some old I/O chips, after the execution of an I/O
command, the device requires a certain amount of
time (recovery time) before the execution of the next
I/O command. Because of new generation CPU and
mainboard chipset, the assertion of I/O command is
faster, and sometimes shorter than specified I/O
recovery time of old I/O devices. This item lets you
specify the delay of 8-bit I/O command by count of
ISA bus clock. If you find any unstable 8-bit I/O card,
you may try to extend the I/O recovery time via this
item. The BIOS default value is 4 ISA clock. If set to
NA, the chipset will insert 3.5 system clocks.
Chipset Features à 16 Bit I/O Recovery Time
16 Bit I/O Recovery
Time
1
2
3
4
NA
The same as 16-bit I/O recovery time. This item lets
you specify the recovery time for the execution of 16-
bit I/O commands by count of ISA bus clock. If you
find any of the installed 16-bit I/O cards unstable, try
extending the I/O recovery time via this item. The
BIOS default value is 1 ISA clocks. If set to NA, the
chipset will automatically insert 3.5 system clocks.
Chipset Features à Memory Hole At 15M-16M
Memory Hole At
15M-16M
Enabled
Disabled
This option lets you reserve system memory area for
special ISA cards. The chipset accesses code/data
of these areas from the ISA bus directly. Normally,
these areas are reserved for memory mapped I/O
card.
Chipset Features à Passive Release
Passive Release
Enabled
Disabled
This item lets you control the Passive Release
function of the PIIX4E chipset (Intel PCI to ISA
bridge). This function is used to meet latency of ISA
bus master. Try to enable or disable it, if you have
ISA card compatibility problem.