User Guide

Hardware Installation
2-23
For double side memory module, there is one limitation. This mainboard supports
only 4 RAS# (Row address latch) signals for DRAM control. They can only be
occupied by one DRAM module, they can not be shared. The simple rule is: If
double side module at either Bank0 or DIMM1, the other must be empty, if
you use double side at Bank0, DIMM1 must be empty. If you use at DIMM1, Bank0
must be empty. Bank1 and DIMM2 have the same limitation.
Double side module at either Bank0
or DIMM1, the other must be empty.
Double side module at either Bank1
or DIMM2, the other must be empty.
Following table explains more about the RAS limitation. You can see that Bank0 1st
side and DIMM1 2nd side use the same RAS0#, and Bank0 2nd side and DIMM1
1st side use the same RAS1#. If you are using single side SIMM at Bank0 and
single side DIMM at DIMM1, it should be no problem. But only one double side
DIMM or double side SIMM can be at Bank0 or DIMM1.
Bank0
1st
side
Bank0
2nd
side
Bank1
1st
side
Bank1
2nd
side
DIMM1
1st
side
DIMM1
2nd
side
DIMM2
1st
side
DIMM2
2nd
side
RAS0#
X X
RAS1#
X X
RAS2#
X X
RAS3#
X X
Caution: Make sure that you install the same SIMM type
and size for each bank.
Caution: There are some old DIMMs made by EDO or
FPM memory chip, they can only accept 5V power and
probably can not fit into the DIMM socket, make sure you
have 3.3V true SDRAM DIMM before your insert it.
Tip: If you have DIMM made by 3V EDO, it is possible that
TX chipset can support it. But because it is so rare, the
only 3V EDO DIMM had been tested by this mainboard is
Micron MT4LC2M8E7DJ-6.