User Guide

Frequently Asked Questions
B-5
with SDRAM DIMM. AOpen is the first company to support dual-SDRAM
DIMMs onboard (AP5V), from Q1 1996.
Q: Can SDRAM DIMM work together with FPM/EDO SIMM?
A: The FPM/EDO operate at 5V while SDRAM operates at 3.3V. The current MB
design provides different power to DIMM and SIMM but connects the data bus
together. If you combine SIMM and DIMM, the system will still work fine;
however, only temporarily. After a few months, the SDRAM 3.3V data input will
be damaged by 5V FPM/EDO data output line. Therefore, we strongly NOT
recommend DIMM and SIMM combined together. There is one exception, if
your SDRAM supports 5V tolerance (such as TI or Samsung), which accepts 5V
signal at 3.3V operating power, you can combine them.
Manufacturer Model Suggested CAS
Latency Time
5V
Tolerance
Samsung KM416511220AT-G12 2 Yes
NEC D4S16162G5-A12-7JF 2 No
Hitachi HM5216805TT10
2 No
TI
TMX626812DGE-12
2 Yes
TI
TMS626812DGE-15
3 Yes
TI
TMS626162DGE-15
3 Yes
TI
TMS626162DGE-M67
3 Yes
Q: What is Bus Master IDE (DMA mode)?
A: The traditional PIO (Programmable I/O) IDE requires the CPU to involve in all
the activities of the IDE access including waiting for the mechanical events. To
reduce the workload of the CPU, the bus master IDE device transfers data
from/to memory without interrupting CPU, and releases CPU to operate
concurrently while data is transferring between memory and IDE device. You
need the bus master IDE driver and the bus master IDE HDD to support bus
master IDE mode. Note that it is different with master/slave mode of the IDE
device connection. For more details, refer to section 2.3 "Connectors".