User Guide

AWARD BIOS
3-17
Chipset Features Memory Hole At 15M-16M
Memory Hole At
15M-16M
Enabled
Disabled
This option lets you reserve system memory area for
special ISA cards. The chipset accesses code/data of
these areas from the ISA bus directly. Normally,
these areas are reserved for memory mapped I/O
card.
Chipset Features PCI Passive Release
PCI Passive Release
Enabled
Disabled
This item lets you control the Passive Release
function of the PIIX3 chipset (Intel PCI to ISA bridge).
This function is used to meet latency of ISA bus
master. Try to enable or disable it, if you have ISA
card compatibility problem.
Chipset Features PCI Delayed Transaction
PCI Delayed
Transaction
Enabled
Disabled
This item lets you control the Delayed Transaction
function of the PIIX3 chipset (Intel PCI to ISA bridge).
This function is used to meet latency of PCI cycles to
or from ISA bus. Try to enable or disable it, if you
have ISA card compatibility problem.