User Guide

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Bus Master IDE (DMA mode).......................................................................................................... 90
CNR (Communication and Networking Riser)................................................................................. 90
CODEC (Coding and Decoding) ..................................................................................................... 90
DDR (Double Data Rated) SDRAM................................................................................................. 90
DIMM (Dual In Line Memory Module) ............................................................................................91
DMA (Direct Memory Access)......................................................................................................... 91
ECC (Error Checking and Correction)............................................................................................. 91
EDO (Extended Data Output) Memory............................................................................................ 91
EEPROM (Electronic Erasable Programmable ROM)....................................................................92
EPROM (Erasable Programmable ROM)........................................................................................ 92
EV6 Bus ......................................................................................................................................... 92
FCC DoC (Declaration of Conformity)............................................................................................. 92
FC-PGA (Flip Chip-Pin Grid Array) ................................................................................................. 93
Flash ROM ..................................................................................................................................... 93
FSB (Front Side Bus) Clock............................................................................................................ 93
I
2
C Bus ........................................................................................................................................... 93
IEEE 1394 ...................................................................................................................................... 94
Parity Bit......................................................................................................................................... 94
6
PBSRAM (Pipelined Burst SRAM) .................................................................................................. 94