Datasheet

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Flash boot sequence
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Flash programming routines
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USB mass storage device with UF2 support
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Utility libraries such as fast floating point
The boot sequence of the chip is defined in Section 2.8.1, and the ROM contents is described in more detail in Section
2.8. The full source code for the RP2040 bootrom is available at:
https://github.com/raspberrypi/pico-bootrom
The ROM offers single-cycle read-only bus access, and is on a dedicated AHB-Lite arbiter, so it can be accessed
simultaneously with other memory devices. Attempting to write to the ROM has no effect (no bus fault is generated).
2.6.2. SRAM
There is a total of 264kB of on-chip SRAM. Physically this is partitioned into six banks, as this vastly improves memory
bandwidth for multiple masters, but software may treat it as a single 264kB memory region. There are no restrictions on
what is stored in each bank: processor code, data buffers, or a mixture. There are four 16k x 32-bit banks (64kB each)
and two 1k x 32-bit banks (4kB each).

IMPORTANT
Banking is a physical partitioning of SRAM which improves performance by allowing multiple simultaneous
accesses. Logically there is a single 264kB contiguous memory.
Each SRAM bank is accessed via a dedicated AHB-Lite arbiter. This means different bus masters can access different
SRAM banks in parallel, so up to four 32-bit SRAM accesses can take place every system clock cycle (one per master).
SRAM is mapped to system addresses starting at 0x20000000. The first 256kB address region is word-striped across the
four larger banks, which provides a significant memory parallelism benefits for most use cases.
Consecutive words in the system address space are routed to different RAM banks as shown in Table 164.
Table 164. SRAM
bank0/1/2/3 striped
mapping.
System address SRAM Bank SRAM word address
0x20000000
Bank 0 0
0x20000004
Bank 1 0
0x20000008
Bank 2 0
0x2000000c
Bank 3 0
0x20000010
Bank 0 1
0x20000014
Bank 1 1
0x20000018
Bank 2 1
0x2000001c
Bank 3 1
0x20000020
Bank 0 2
0x20000024
Bank 1 2
0x20000028
Bank 2 2
0x2000002c
Bank 3 2
etc
The next two 4kB regions (starting at 0x20040000 and 0x20041000) are mapped directly to the smaller, 4kB memory banks.
Software may choose to use these for per-core purposes, e.g. stack and frequently-executed code, guaranteeing that
RP2040 Datasheet
2.6. Memory 148